#include "tgsi/tgsi_info.h"
#include "util/u_math.h"
#include "util/u_memory.h"
+#include "st_glsl_types.h"
#include "st_program.h"
#include "st_mesa_to_tgsi.h"
#include "st_format.h"
-#include "st_glsl_types.h"
#include "st_nir.h"
#include "st_shader_cache.h"
+#include "st_glsl_to_tgsi_private.h"
#include "util/hash_table.h"
#include <algorithm>
#define MAX_GLSL_TEXTURE_OFFSET 4
-class st_src_reg;
-class st_dst_reg;
-
-static int swizzle_for_size(int size);
-
-static int swizzle_for_type(const glsl_type *type, int component = 0)
-{
- unsigned num_elements = 4;
-
- if (type) {
- type = type->without_array();
- if (type->is_scalar() || type->is_vector() || type->is_matrix())
- num_elements = type->vector_elements;
- }
-
- int swizzle = swizzle_for_size(num_elements);
- assert(num_elements + component <= 4);
-
- swizzle += component * MAKE_SWIZZLE4(1, 1, 1, 1);
- return swizzle;
-}
-
-/**
- * This struct is a corresponding struct to TGSI ureg_src.
- */
-class st_src_reg {
-public:
- st_src_reg(gl_register_file file, int index, const glsl_type *type,
- int component = 0, unsigned array_id = 0)
- {
- assert(file != PROGRAM_ARRAY || array_id != 0);
- this->file = file;
- this->index = index;
- this->swizzle = swizzle_for_type(type, component);
- this->negate = 0;
- this->abs = 0;
- this->index2D = 0;
- this->type = type ? type->base_type : GLSL_TYPE_ERROR;
- this->reladdr = NULL;
- this->reladdr2 = NULL;
- this->has_index2 = false;
- this->double_reg2 = false;
- this->array_id = array_id;
- this->is_double_vertex_input = false;
- }
-
- st_src_reg(gl_register_file file, int index, enum glsl_base_type type)
- {
- assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
- this->type = type;
- this->file = file;
- this->index = index;
- this->index2D = 0;
- this->swizzle = SWIZZLE_XYZW;
- this->negate = 0;
- this->abs = 0;
- this->reladdr = NULL;
- this->reladdr2 = NULL;
- this->has_index2 = false;
- this->double_reg2 = false;
- this->array_id = 0;
- this->is_double_vertex_input = false;
- }
-
- st_src_reg(gl_register_file file, int index, enum glsl_base_type type, int index2D)
- {
- assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
- this->type = type;
- this->file = file;
- this->index = index;
- this->index2D = index2D;
- this->swizzle = SWIZZLE_XYZW;
- this->negate = 0;
- this->abs = 0;
- this->reladdr = NULL;
- this->reladdr2 = NULL;
- this->has_index2 = false;
- this->double_reg2 = false;
- this->array_id = 0;
- this->is_double_vertex_input = false;
- }
-
- st_src_reg()
- {
- this->type = GLSL_TYPE_ERROR;
- this->file = PROGRAM_UNDEFINED;
- this->index = 0;
- this->index2D = 0;
- this->swizzle = 0;
- this->negate = 0;
- this->abs = 0;
- this->reladdr = NULL;
- this->reladdr2 = NULL;
- this->has_index2 = false;
- this->double_reg2 = false;
- this->array_id = 0;
- this->is_double_vertex_input = false;
- }
-
- explicit st_src_reg(st_dst_reg reg);
-
- int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
- int16_t index2D;
- uint16_t swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
- int negate:4; /**< NEGATE_XYZW mask from mesa */
- unsigned abs:1;
- enum glsl_base_type type:5; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
- unsigned has_index2:1;
- gl_register_file file:5; /**< PROGRAM_* from Mesa */
- /*
- * Is this the second half of a double register pair?
- * currently used for input mapping only.
- */
- unsigned double_reg2:1;
- unsigned is_double_vertex_input:1;
- unsigned array_id:10;
-
- /** Register index should be offset by the integer in this reg. */
- st_src_reg *reladdr;
- st_src_reg *reladdr2;
-
- st_src_reg get_abs()
- {
- st_src_reg reg = *this;
- reg.negate = 0;
- reg.abs = 1;
- return reg;
- }
-};
-
-class st_dst_reg {
-public:
- st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type, int index)
- {
- assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
- this->file = file;
- this->index = index;
- this->index2D = 0;
- this->writemask = writemask;
- this->reladdr = NULL;
- this->reladdr2 = NULL;
- this->has_index2 = false;
- this->type = type;
- this->array_id = 0;
- }
-
- st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type)
- {
- assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
- this->file = file;
- this->index = 0;
- this->index2D = 0;
- this->writemask = writemask;
- this->reladdr = NULL;
- this->reladdr2 = NULL;
- this->has_index2 = false;
- this->type = type;
- this->array_id = 0;
- }
-
- st_dst_reg()
- {
- this->type = GLSL_TYPE_ERROR;
- this->file = PROGRAM_UNDEFINED;
- this->index = 0;
- this->index2D = 0;
- this->writemask = 0;
- this->reladdr = NULL;
- this->reladdr2 = NULL;
- this->has_index2 = false;
- this->array_id = 0;
- }
-
- explicit st_dst_reg(st_src_reg reg);
-
- int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
- int16_t index2D;
- gl_register_file file:5; /**< PROGRAM_* from Mesa */
- unsigned writemask:4; /**< Bitfield of WRITEMASK_[XYZW] */
- enum glsl_base_type type:5; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
- unsigned has_index2:1;
- unsigned array_id:10;
-
- /** Register index should be offset by the integer in this reg. */
- st_src_reg *reladdr;
- st_src_reg *reladdr2;
-};
-
-st_src_reg::st_src_reg(st_dst_reg reg)
+static unsigned is_precise(const ir_variable *ir)
{
- this->type = reg.type;
- this->file = reg.file;
- this->index = reg.index;
- this->swizzle = SWIZZLE_XYZW;
- this->negate = 0;
- this->abs = 0;
- this->reladdr = reg.reladdr;
- this->index2D = reg.index2D;
- this->reladdr2 = reg.reladdr2;
- this->has_index2 = reg.has_index2;
- this->double_reg2 = false;
- this->array_id = reg.array_id;
- this->is_double_vertex_input = false;
+ if (!ir)
+ return 0;
+ return ir->data.precise || ir->data.invariant;
}
-st_dst_reg::st_dst_reg(st_src_reg reg)
-{
- this->type = reg.type;
- this->file = reg.file;
- this->index = reg.index;
- this->writemask = WRITEMASK_XYZW;
- this->reladdr = reg.reladdr;
- this->index2D = reg.index2D;
- this->reladdr2 = reg.reladdr2;
- this->has_index2 = reg.has_index2;
- this->array_id = reg.array_id;
-}
-
-class glsl_to_tgsi_instruction : public exec_node {
-public:
- DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
-
- st_dst_reg dst[2];
- st_src_reg src[4];
- st_src_reg resource; /**< sampler or buffer register */
- st_src_reg *tex_offsets;
-
- /** Pointer to the ir source this tree came from for debugging */
- ir_instruction *ir;
-
- unsigned op:8; /**< TGSI opcode */
- unsigned saturate:1;
- unsigned is_64bit_expanded:1;
- unsigned sampler_base:5;
- unsigned sampler_array_size:6; /**< 1-based size of sampler array, 1 if not array */
- unsigned tex_target:4; /**< One of TEXTURE_*_INDEX */
- glsl_base_type tex_type:5;
- unsigned tex_shadow:1;
- unsigned image_format:9;
- unsigned tex_offset_num_offset:3;
- unsigned dead_mask:4; /**< Used in dead code elimination */
- unsigned buffer_access:3; /**< buffer access type */
-
- const struct tgsi_opcode_info *info;
-};
-
class variable_storage {
DECLARE_RZALLOC_CXX_OPERATORS(variable_storage)
return GLSL_TYPE_ERROR;
}
-struct rename_reg_pair {
- bool valid;
- int new_reg;
-};
-
struct glsl_to_tgsi_visitor : public ir_visitor {
public:
glsl_to_tgsi_visitor();
bool have_fma;
bool use_shared_memory;
bool has_tex_txf_lz;
+ bool precise;
variable_storage *find_variable_storage(ir_variable *var);
prog->data->LinkStatus = linking_failure;
}
-static int
+int
swizzle_for_size(int size)
{
static const int size_swizzles[4] = {
return size_swizzles[size - 1];
}
-static bool
-is_resource_instruction(unsigned opcode)
-{
- switch (opcode) {
- case TGSI_OPCODE_RESQ:
- case TGSI_OPCODE_LOAD:
- case TGSI_OPCODE_ATOMUADD:
- case TGSI_OPCODE_ATOMXCHG:
- case TGSI_OPCODE_ATOMCAS:
- case TGSI_OPCODE_ATOMAND:
- case TGSI_OPCODE_ATOMOR:
- case TGSI_OPCODE_ATOMXOR:
- case TGSI_OPCODE_ATOMUMIN:
- case TGSI_OPCODE_ATOMUMAX:
- case TGSI_OPCODE_ATOMIMIN:
- case TGSI_OPCODE_ATOMIMAX:
- return true;
- default:
- return false;
- }
-}
-
-static unsigned
-num_inst_dst_regs(const glsl_to_tgsi_instruction *op)
-{
- return op->info->num_dst;
-}
-
-static unsigned
-num_inst_src_regs(const glsl_to_tgsi_instruction *op)
-{
- return op->info->is_tex || is_resource_instruction(op->op) ?
- op->info->num_src - 1 : op->info->num_src;
-}
glsl_to_tgsi_instruction *
glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op,
STATIC_ASSERT(TGSI_OPCODE_LAST <= 255);
inst->op = op;
+ inst->precise = this->precise;
inst->info = tgsi_get_opcode_info(op);
inst->dst[0] = dst;
inst->dst[1] = dst1;
else \
op = TGSI_OPCODE_##f; \
break;
-#define case5(c, f, i, u, d) \
- case TGSI_OPCODE_##c: \
- if (type == GLSL_TYPE_DOUBLE) \
- op = TGSI_OPCODE_##d; \
- else if (type == GLSL_TYPE_INT) \
- op = TGSI_OPCODE_##i; \
- else if (type == GLSL_TYPE_UINT) \
- op = TGSI_OPCODE_##u; \
- else \
- op = TGSI_OPCODE_##f; \
- break;
-
-#define case4(c, f, i, u) \
- case TGSI_OPCODE_##c: \
- if (type == GLSL_TYPE_INT) \
- op = TGSI_OPCODE_##i; \
- else if (type == GLSL_TYPE_UINT) \
- op = TGSI_OPCODE_##u; \
- else \
- op = TGSI_OPCODE_##f; \
- break;
-
-#define case3(f, i, u) case4(f, f, i, u)
-#define case6d(f, i, u, d, i64, u64) case7(f, f, i, u, d, i64, u64)
-#define case3fid(f, i, d) case5(f, f, i, i, d)
-#define case3fid64(f, i, d, i64) case7(f, f, i, i, d, i64, i64)
-#define case2fi(f, i) case4(f, f, i, i)
-#define case2iu(i, u) case4(i, LAST, i, u)
-
-#define case2iu64(i, i64) case7(i, LAST, i, i, LAST, i64, i64)
-#define case4iu64(i, u, i64, u64) case7(i, LAST, i, u, LAST, i64, u64)
#define casecomp(c, f, i, u, d, i64, ui64) \
case TGSI_OPCODE_##c: \
break;
switch(op) {
- case3fid64(ADD, UADD, DADD, U64ADD);
- case3fid64(MUL, UMUL, DMUL, U64MUL);
- case3fid(MAD, UMAD, DMAD);
- case3fid(FMA, UMAD, DFMA);
- case6d(DIV, IDIV, UDIV, DDIV, I64DIV, U64DIV);
- case6d(MAX, IMAX, UMAX, DMAX, I64MAX, U64MAX);
- case6d(MIN, IMIN, UMIN, DMIN, I64MIN, U64MIN);
- case4iu64(MOD, UMOD, I64MOD, U64MOD);
+ /* Some instructions are initially selected without considering the type.
+ * This fixes the type:
+ *
+ * INIT FLOAT SINT UINT DOUBLE SINT64 UINT64
+ */
+ case7(ADD, ADD, UADD, UADD, DADD, U64ADD, U64ADD);
+ case7(CEIL, CEIL, LAST, LAST, DCEIL, LAST, LAST);
+ case7(DIV, DIV, IDIV, UDIV, DDIV, I64DIV, U64DIV);
+ case7(FMA, FMA, UMAD, UMAD, DFMA, LAST, LAST);
+ case7(FLR, FLR, LAST, LAST, DFLR, LAST, LAST);
+ case7(FRC, FRC, LAST, LAST, DFRAC, LAST, LAST);
+ case7(MUL, MUL, UMUL, UMUL, DMUL, U64MUL, U64MUL);
+ case7(MAD, MAD, UMAD, UMAD, DMAD, LAST, LAST);
+ case7(MAX, MAX, IMAX, UMAX, DMAX, I64MAX, U64MAX);
+ case7(MIN, MIN, IMIN, UMIN, DMIN, I64MIN, U64MIN);
+ case7(RCP, RCP, LAST, LAST, DRCP, LAST, LAST);
+ case7(ROUND, ROUND,LAST, LAST, DROUND, LAST, LAST);
+ case7(RSQ, RSQ, LAST, LAST, DRSQ, LAST, LAST);
+ case7(SQRT, SQRT, LAST, LAST, DSQRT, LAST, LAST);
+ case7(SSG, SSG, ISSG, ISSG, DSSG, I64SSG, I64SSG);
+ case7(TRUNC, TRUNC,LAST, LAST, DTRUNC, LAST, LAST);
+
+ case7(MOD, LAST, MOD, UMOD, LAST, I64MOD, U64MOD);
+ case7(SHL, LAST, SHL, SHL, LAST, U64SHL, U64SHL);
+ case7(IBFE, LAST, IBFE, UBFE, LAST, LAST, LAST);
+ case7(IMSB, LAST, IMSB, UMSB, LAST, LAST, LAST);
+ case7(IMUL_HI, LAST, IMUL_HI, UMUL_HI, LAST, LAST, LAST);
+ case7(ISHR, LAST, ISHR, USHR, LAST, I64SHR, U64SHR);
+ case7(ATOMIMAX,LAST, ATOMIMAX,ATOMUMAX,LAST, LAST, LAST);
+ case7(ATOMIMIN,LAST, ATOMIMIN,ATOMUMIN,LAST, LAST, LAST);
casecomp(SEQ, FSEQ, USEQ, USEQ, DSEQ, U64SEQ, U64SEQ);
casecomp(SNE, FSNE, USNE, USNE, DSNE, U64SNE, U64SNE);
casecomp(SGE, FSGE, ISGE, USGE, DSGE, I64SGE, U64SGE);
casecomp(SLT, FSLT, ISLT, USLT, DSLT, I64SLT, U64SLT);
- case2iu64(SHL, U64SHL);
- case4iu64(ISHR, USHR, I64SHR, U64SHR);
-
- case3fid64(SSG, ISSG, DSSG, I64SSG);
-
- case2iu(IBFE, UBFE);
- case2iu(IMSB, UMSB);
- case2iu(IMUL_HI, UMUL_HI);
-
- case3fid(SQRT, SQRT, DSQRT);
-
- case3fid(RCP, RCP, DRCP);
- case3fid(RSQ, RSQ, DRSQ);
-
- case3fid(FRC, FRC, DFRAC);
- case3fid(TRUNC, TRUNC, DTRUNC);
- case3fid(CEIL, CEIL, DCEIL);
- case3fid(FLR, FLR, DFLR);
- case3fid(ROUND, ROUND, DROUND);
-
- case2iu(ATOMIMAX, ATOMUMAX);
- case2iu(ATOMIMIN, ATOMUMIN);
-
default: break;
}
static int
attrib_type_size(const struct glsl_type *type, bool is_vs_input)
{
- return st_glsl_attrib_type_size(type, is_vs_input);
+ return type->count_attribute_slots(is_vs_input);
}
static int
type_size(const struct glsl_type *type)
{
- return st_glsl_type_size(type);
+ return type->count_attribute_slots(false);
}
/**
/* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
*/
- if (ir->operation == ir_binop_add) {
+ if (!this->precise && ir->operation == ir_binop_add) {
if (try_emit_mad(ir, 1))
return;
if (try_emit_mad(ir, 0))
if (ir->operation == ir_quadop_vector)
assert(!"ir_quadop_vector should have been lowered");
- for (unsigned int operand = 0; operand < ir->get_num_operands(); operand++) {
+ for (unsigned int operand = 0; operand < ir->num_operands; operand++) {
this->result.file = PROGRAM_UNDEFINED;
ir->operands[operand]->accept(this);
if (this->result.file == PROGRAM_UNDEFINED) {
ir_constant *const_uniform_block = ir->operands[0]->as_constant();
ir_constant *const_offset_ir = ir->operands[1]->as_constant();
unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
- unsigned const_block = const_uniform_block ? const_uniform_block->value.u[0] + 1 : 0;
+ unsigned const_block = const_uniform_block ? const_uniform_block->value.u[0] + 1 : 1;
st_src_reg index_reg = get_temp(glsl_type::uint_type);
st_src_reg cbuf;
cbuf.reladdr = NULL;
cbuf.negate = 0;
cbuf.abs = 0;
+ cbuf.index2D = const_block;
assert(ir->type->is_vector() || ir->type->is_scalar());
if (const_uniform_block) {
/* Constant constant buffer */
cbuf.reladdr2 = NULL;
- cbuf.index2D = const_block;
- cbuf.has_index2 = true;
}
else {
/* Relative/variable constant buffer */
cbuf.reladdr2 = ralloc(mem_ctx, st_src_reg);
- cbuf.index2D = 1;
memcpy(cbuf.reladdr2, &op[0], sizeof(st_src_reg));
- cbuf.has_index2 = true;
}
+ cbuf.has_index2 = true;
cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
if (glsl_base_type_is_64bit(cbuf.type))
case ir_unop_pack_int_2x32:
case ir_unop_unpack_uint_2x32:
case ir_unop_pack_uint_2x32:
+ case ir_unop_unpack_sampler_2x32:
+ case ir_unop_pack_sampler_2x32:
+ case ir_unop_unpack_image_2x32:
+ case ir_unop_pack_image_2x32:
emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0]);
break;
case ir_unop_unpack_snorm_4x8:
case ir_unop_unpack_unorm_4x8:
- case ir_unop_unpack_sampler_2x32:
- case ir_unop_pack_sampler_2x32:
- case ir_unop_unpack_image_2x32:
- case ir_unop_pack_image_2x32:
-
case ir_quadop_vector:
case ir_binop_vector_extract:
case ir_triop_vector_insert:
this->result = st_src_reg(entry->file, entry->index, var->type,
entry->component, entry->array_id);
- if (this->shader->Stage == MESA_SHADER_VERTEX && var->data.mode == ir_var_shader_in && var->type->is_double())
+ if (this->shader->Stage == MESA_SHADER_VERTEX &&
+ var->data.mode == ir_var_shader_in &&
+ var->type->without_array()->is_double())
this->result.is_double_vertex_input = true;
if (!native_integers)
this->result.type = GLSL_TYPE_FLOAT;
{
ir_constant *index;
st_src_reg src;
- int element_size = type_size(ir->type);
bool is_2D = false;
+ ir_variable *var = ir->variable_referenced();
- index = ir->array_index->constant_expression_value();
+ /* We only need the logic provided by st_glsl_storage_type_size()
+ * for arrays of structs. Indirect sampler and image indexing is handled
+ * elsewhere.
+ */
+ int element_size = ir->type->without_array()->is_record() ?
+ st_glsl_storage_type_size(ir->type, var->data.bindless) :
+ type_size(ir->type);
+
+ index = ir->array_index->constant_expression_value(ralloc_parent(ir));
ir->array->accept(this);
src = this->result;
{
unsigned int i;
const glsl_type *struct_type = ir->record->type;
+ ir_variable *var = ir->record->variable_referenced();
int offset = 0;
ir->record->accept(this);
+ assert(ir->field_idx >= 0);
+ assert(var);
for (i = 0; i < struct_type->length; i++) {
- if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
+ if (i == (unsigned) ir->field_idx)
break;
- offset += type_size(struct_type->fields.structure[i].type);
+ const glsl_type *member_type = struct_type->fields.structure[i].type;
+ offset += st_glsl_storage_type_size(member_type, var->data.bindless);
}
/* If the type is smaller than a vec4, replicate the last channel out. */
ir_expression *const expr = ir->as_expression();
if (native_integers) {
- if ((expr != NULL) && (expr->get_num_operands() == 2)) {
+ if ((expr != NULL) && (expr->num_operands == 2)) {
enum glsl_base_type type = expr->operands[0]->type->base_type;
if (type == GLSL_TYPE_INT || type == GLSL_TYPE_UINT ||
type == GLSL_TYPE_BOOL) {
return switch_order;
}
- if ((expr != NULL) && (expr->get_num_operands() == 2)) {
+ if ((expr != NULL) && (expr->num_operands == 2)) {
bool zero_on_left = false;
if (expr->operands[0]->is_zero()) {
st_dst_reg l;
st_src_reg r;
+ /* all generated instructions need to be flaged as precise */
+ this->precise = is_precise(ir->lhs->variable_referenced());
ir->rhs->accept(this);
r = this->result;
} else {
emit_block_mov(ir, ir->rhs->type, &l, &r, NULL, false);
}
+ this->precise = 0;
}
}
}
+static void
+get_image_qualifiers(ir_dereference *ir, const glsl_type **type,
+ bool *memory_coherent, bool *memory_volatile,
+ bool *memory_restrict, unsigned *image_format)
+{
+
+ switch (ir->ir_type) {
+ case ir_type_dereference_record: {
+ ir_dereference_record *deref_record = ir->as_dereference_record();
+ const glsl_type *struct_type = deref_record->record->type;
+ int fild_idx = deref_record->field_idx;
+
+ *type = struct_type->fields.structure[fild_idx].type->without_array();
+ *memory_coherent =
+ struct_type->fields.structure[fild_idx].memory_coherent;
+ *memory_volatile =
+ struct_type->fields.structure[fild_idx].memory_volatile;
+ *memory_restrict =
+ struct_type->fields.structure[fild_idx].memory_restrict;
+ *image_format =
+ struct_type->fields.structure[fild_idx].image_format;
+ break;
+ }
+
+ case ir_type_dereference_array: {
+ ir_dereference_array *deref_arr = ir->as_dereference_array();
+ get_image_qualifiers((ir_dereference *)deref_arr->array, type,
+ memory_coherent, memory_volatile, memory_restrict,
+ image_format);
+ break;
+ }
+
+ case ir_type_dereference_variable: {
+ ir_variable *var = ir->variable_referenced();
+
+ *type = var->type->without_array();
+ *memory_coherent = var->data.memory_coherent;
+ *memory_volatile = var->data.memory_volatile;
+ *memory_restrict = var->data.memory_restrict;
+ *image_format = var->data.image_format;
+ break;
+ }
+
+ default:
+ break;
+ }
+}
+
void
glsl_to_tgsi_visitor::visit_image_intrinsic(ir_call *ir)
{
ir_dereference *img = (ir_dereference *)param;
const ir_variable *imgvar = img->variable_referenced();
- const glsl_type *type = imgvar->type->without_array();
unsigned sampler_array_size = 1, sampler_base = 0;
+ bool memory_coherent = false, memory_volatile = false, memory_restrict = false;
+ unsigned image_format = 0;
+ const glsl_type *type = NULL;
+
+ get_image_qualifiers(img, &type, &memory_coherent, &memory_volatile,
+ &memory_restrict, &image_format);
st_src_reg reladdr;
st_src_reg image(PROGRAM_IMAGE, 0, GLSL_TYPE_UINT);
uint16_t index = 0;
get_deref_offsets(img, &sampler_array_size, &sampler_base,
- &index, &reladdr, true);
+ &index, &reladdr, !imgvar->contains_bindless());
image.index = index;
if (reladdr.file != PROGRAM_UNDEFINED) {
inst->dst[0].writemask = WRITEMASK_XYZW;
}
- inst->resource = image;
- inst->sampler_array_size = sampler_array_size;
- inst->sampler_base = sampler_base;
+ if (imgvar->contains_bindless()) {
+ img->accept(this);
+ inst->resource = this->result;
+ inst->resource.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
+ SWIZZLE_X, SWIZZLE_Y);
+ } else {
+ inst->resource = image;
+ inst->sampler_array_size = sampler_array_size;
+ inst->sampler_base = sampler_base;
+ }
inst->tex_target = type->sampler_index();
inst->image_format = st_mesa_format_to_pipe_format(st_context(ctx),
- _mesa_get_shader_image_format(imgvar->data.image_format));
+ _mesa_get_shader_image_format(image_format));
- if (imgvar->data.memory_coherent)
+ if (memory_coherent)
inst->buffer_access |= TGSI_MEMORY_COHERENT;
- if (imgvar->data.memory_restrict)
+ if (memory_restrict)
inst->buffer_access |= TGSI_MEMORY_RESTRICT;
- if (imgvar->data.memory_volatile)
+ if (memory_volatile)
inst->buffer_access |= TGSI_MEMORY_VOLATILE;
}
ir->return_deref->accept(this);
st_dst_reg dst = st_dst_reg(this->result);
+ dst.writemask = u_bit_consecutive(0, ir->return_deref->var->type->vector_elements);
+
st_src_reg src[4] = { undef_src, undef_src, undef_src, undef_src };
unsigned num_src = 0;
foreach_in_list(ir_rvalue, param, &ir->actual_parameters) {
case ir_type_dereference_record: {
ir_dereference_record *deref_record = tail->as_dereference_record();
const glsl_type *struct_type = deref_record->record->type;
- int field_index = deref_record->record->type->field_index(deref_record->field);
+ int field_index = deref_record->field_idx;
calc_deref_offsets(deref_record->record->as_dereference(), array_elements, index, indirect, location);
case ir_type_dereference_array: {
ir_dereference_array *deref_arr = tail->as_dereference_array();
- ir_constant *array_index = deref_arr->array_index->constant_expression_value();
+
+ void *mem_ctx = ralloc_parent(deref_arr);
+ ir_constant *array_index =
+ deref_arr->array_index->constant_expression_value(mem_ctx);
if (!array_index) {
st_src_reg temp_reg;
mem_ctx = ralloc_context(NULL);
ctx = NULL;
prog = NULL;
+ precise = 0;
shader_program = NULL;
shader = NULL;
options = NULL;
}
}
+ if (inst->resource.file == PROGRAM_TEMPORARY) {
+ int old_idx = inst->resource.index;
+ if (renames[old_idx].valid)
+ inst->resource.index = renames[old_idx].new_reg;
+ }
+
for (j = 0; j < num_inst_dst_regs(inst); j++) {
if (inst->dst[j].file == PROGRAM_TEMPORARY) {
int old_idx = inst->dst[j].index;
}
}
}
+
+ if (inst->resource.file == PROGRAM_TEMPORARY) {
+ int src_chans;
+
+ src_chans = 1 << GET_SWZ(inst->resource.swizzle, 0);
+ src_chans |= 1 << GET_SWZ(inst->resource.swizzle, 1);
+ src_chans |= 1 << GET_SWZ(inst->resource.swizzle, 2);
+ src_chans |= 1 << GET_SWZ(inst->resource.swizzle, 3);
+
+ for (int c = 0; c < 4; c++) {
+ if (src_chans & (1 << c))
+ writes[4 * inst->resource.index + c] = NULL;
+ }
+ }
+
break;
}
}
/**
- * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
+ * Create a TGSI ureg_dst register from an st_dst_reg.
+ */
+static struct ureg_dst
+translate_dst(struct st_translate *t,
+ const st_dst_reg *dst_reg,
+ bool saturate)
+{
+ struct ureg_dst dst = dst_register(t, dst_reg->file, dst_reg->index,
+ dst_reg->array_id);
+
+ if (dst.File == TGSI_FILE_NULL)
+ return dst;
+
+ dst = ureg_writemask(dst, dst_reg->writemask);
+
+ if (saturate)
+ dst = ureg_saturate(dst);
+
+ if (dst_reg->reladdr != NULL) {
+ assert(dst_reg->file != PROGRAM_TEMPORARY);
+ dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
+ }
+
+ if (dst_reg->has_index2) {
+ if (dst_reg->reladdr2)
+ dst = ureg_dst_dimension_indirect(dst, ureg_src(t->address[1]),
+ dst_reg->index2D);
+ else
+ dst = ureg_dst_dimension(dst, dst_reg->index2D);
+ }
+
+ return dst;
+}
+
+/**
+ * Create a TGSI ureg_src register from an st_src_reg.
*/
static struct ureg_src
-src_register(struct st_translate *t, const st_src_reg *reg)
+translate_src(struct st_translate *t, const st_src_reg *src_reg)
{
- int index = reg->index;
- int double_reg2 = reg->double_reg2 ? 1 : 0;
+ struct ureg_src src;
+ int index = src_reg->index;
+ int double_reg2 = src_reg->double_reg2 ? 1 : 0;
- switch(reg->file) {
+ switch(src_reg->file) {
case PROGRAM_UNDEFINED:
- return ureg_imm4f(t->ureg, 0, 0, 0, 0);
+ src = ureg_imm4f(t->ureg, 0, 0, 0, 0);
+ break;
case PROGRAM_TEMPORARY:
case PROGRAM_ARRAY:
- return ureg_src(dst_register(t, reg->file, reg->index, reg->array_id));
+ src = ureg_src(dst_register(t, src_reg->file, src_reg->index, src_reg->array_id));
+ break;
case PROGRAM_OUTPUT: {
- struct ureg_dst dst = dst_register(t, reg->file, reg->index, reg->array_id);
+ struct ureg_dst dst = dst_register(t, src_reg->file, src_reg->index, src_reg->array_id);
assert(dst.WriteMask != 0);
unsigned shift = ffs(dst.WriteMask) - 1;
- return ureg_swizzle(ureg_src(dst),
- shift,
- MIN2(shift + 1, 3),
- MIN2(shift + 2, 3),
- MIN2(shift + 3, 3));
+ src = ureg_swizzle(ureg_src(dst),
+ shift,
+ MIN2(shift + 1, 3),
+ MIN2(shift + 2, 3),
+ MIN2(shift + 3, 3));
+ break;
}
case PROGRAM_UNIFORM:
- assert(reg->index >= 0);
- return reg->index < t->num_constants ?
- t->constants[reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0);
+ assert(src_reg->index >= 0);
+ src = src_reg->index < t->num_constants ?
+ t->constants[src_reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0);
+ break;
case PROGRAM_STATE_VAR:
case PROGRAM_CONSTANT: /* ie, immediate */
- if (reg->has_index2)
- return ureg_src_register(TGSI_FILE_CONSTANT, reg->index);
+ if (src_reg->has_index2)
+ src = ureg_src_register(TGSI_FILE_CONSTANT, src_reg->index);
else
- return reg->index >= 0 && reg->index < t->num_constants ?
- t->constants[reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0);
+ src = src_reg->index >= 0 && src_reg->index < t->num_constants ?
+ t->constants[src_reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0);
+ break;
case PROGRAM_IMMEDIATE:
- assert(reg->index >= 0 && reg->index < t->num_immediates);
- return t->immediates[reg->index];
+ assert(src_reg->index >= 0 && src_reg->index < t->num_immediates);
+ src = t->immediates[src_reg->index];
+ break;
case PROGRAM_INPUT:
/* GLSL inputs are 64-bit containers, so we have to
* map back to the original index and add the offset after
* mapping. */
index -= double_reg2;
- if (!reg->array_id) {
+ if (!src_reg->array_id) {
assert(t->inputMapping[index] < ARRAY_SIZE(t->inputs));
assert(t->inputs[t->inputMapping[index]].File != TGSI_FILE_NULL);
- return t->inputs[t->inputMapping[index] + double_reg2];
+ src = t->inputs[t->inputMapping[index] + double_reg2];
}
else {
- struct inout_decl *decl = find_inout_array(t->input_decls, t->num_input_decls, reg->array_id);
+ struct inout_decl *decl = find_inout_array(t->input_decls, t->num_input_decls,
+ src_reg->array_id);
unsigned mesa_index = decl->mesa_index;
int slot = t->inputMapping[mesa_index];
assert(slot != -1 && t->inputs[slot].File == TGSI_FILE_INPUT);
- struct ureg_src src = t->inputs[slot];
- src.ArrayID = reg->array_id;
- return ureg_src_array_offset(src, index + double_reg2 - mesa_index);
+ src = t->inputs[slot];
+ src.ArrayID = src_reg->array_id;
+ src = ureg_src_array_offset(src, index + double_reg2 - mesa_index);
}
+ break;
case PROGRAM_ADDRESS:
- return ureg_src(t->address[reg->index]);
+ src = ureg_src(t->address[src_reg->index]);
+ break;
case PROGRAM_SYSTEM_VALUE:
- assert(reg->index < (int) ARRAY_SIZE(t->systemValues));
- return t->systemValues[reg->index];
+ assert(src_reg->index < (int) ARRAY_SIZE(t->systemValues));
+ src = t->systemValues[src_reg->index];
+ break;
default:
assert(!"unknown src register file");
return ureg_src_undef();
}
-}
-
-/**
- * Create a TGSI ureg_dst register from an st_dst_reg.
- */
-static struct ureg_dst
-translate_dst(struct st_translate *t,
- const st_dst_reg *dst_reg,
- bool saturate)
-{
- struct ureg_dst dst = dst_register(t, dst_reg->file, dst_reg->index,
- dst_reg->array_id);
-
- if (dst.File == TGSI_FILE_NULL)
- return dst;
-
- dst = ureg_writemask(dst, dst_reg->writemask);
-
- if (saturate)
- dst = ureg_saturate(dst);
-
- if (dst_reg->reladdr != NULL) {
- assert(dst_reg->file != PROGRAM_TEMPORARY);
- dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
- }
-
- if (dst_reg->has_index2) {
- if (dst_reg->reladdr2)
- dst = ureg_dst_dimension_indirect(dst, ureg_src(t->address[1]),
- dst_reg->index2D);
- else
- dst = ureg_dst_dimension(dst, dst_reg->index2D);
- }
-
- return dst;
-}
-
-/**
- * Create a TGSI ureg_src register from an st_src_reg.
- */
-static struct ureg_src
-translate_src(struct st_translate *t, const st_src_reg *src_reg)
-{
- struct ureg_src src = src_register(t, src_reg);
if (src_reg->has_index2) {
/* 2D indexes occur with geometry shader inputs (attrib, vertex)
case TGSI_OPCODE_IF:
case TGSI_OPCODE_UIF:
assert(num_dst == 0);
- ureg_insn(ureg, inst->op, NULL, 0, src, num_src);
+ ureg_insn(ureg, inst->op, NULL, 0, src, num_src, inst->precise);
return;
case TGSI_OPCODE_TEX:
} else if (inst->resource.file == PROGRAM_BUFFER) {
src[0] = t->buffers[inst->resource.index];
} else {
- src[0] = t->images[inst->resource.index];
+ if (inst->resource.file == PROGRAM_IMAGE) {
+ src[0] = t->images[inst->resource.index];
+ } else {
+ /* Bindless images. */
+ src[0] = translate_src(t, &inst->resource);
+ }
tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
}
if (inst->resource.reladdr)
} else if (inst->resource.file == PROGRAM_BUFFER) {
dst[0] = ureg_dst(t->buffers[inst->resource.index]);
} else {
- dst[0] = ureg_dst(t->images[inst->resource.index]);
+ if (inst->resource.file == PROGRAM_IMAGE) {
+ dst[0] = ureg_dst(t->images[inst->resource.index]);
+ } else {
+ /* Bindless images. */
+ dst[0] = ureg_dst(translate_src(t, &inst->resource));
+ }
tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
}
dst[0] = ureg_writemask(dst[0], inst->dst[0].writemask);
tex_target, inst->image_format);
break;
- case TGSI_OPCODE_SCS:
- dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
- ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
- break;
-
default:
ureg_insn(ureg,
inst->op,
dst, num_dst,
- src, num_src);
+ src, num_src, inst->precise);
break;
}
}
for (i = program->shader->Stage+1; i <= MESA_SHADER_FRAGMENT; i++) {
if (program->shader_program->_LinkedShaders[i]) {
- unsigned next;
-
- switch (i) {
- case MESA_SHADER_TESS_CTRL:
- next = PIPE_SHADER_TESS_CTRL;
- break;
- case MESA_SHADER_TESS_EVAL:
- next = PIPE_SHADER_TESS_EVAL;
- break;
- case MESA_SHADER_GEOMETRY:
- next = PIPE_SHADER_GEOMETRY;
- break;
- case MESA_SHADER_FRAGMENT:
- next = PIPE_SHADER_FRAGMENT;
- break;
- default:
- assert(0);
- continue;
- }
-
- ureg_set_next_shader_processor(ureg, next);
+ ureg_set_next_shader_processor(
+ ureg, pipe_shader_type_from_mesa((gl_shader_stage)i));
break;
}
}
struct gl_shader_compiler_options *options =
&ctx->Const.ShaderCompilerOptions[shader->Stage];
struct pipe_screen *pscreen = ctx->st->pipe->screen;
- enum pipe_shader_type ptarget = st_shader_stage_to_ptarget(shader->Stage);
+ enum pipe_shader_type ptarget = pipe_shader_type_from_mesa(shader->Stage);
unsigned skip_merge_registers;
validate_ir_tree(shader->ir);
pscreen->get_shader_param(pscreen, ptarget,
PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS);
- _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
+ _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
prog->Parameters);
/* Remove reads from output registers. */
gl_shader_stage stage = shader->Stage;
const struct gl_shader_compiler_options *options =
&ctx->Const.ShaderCompilerOptions[stage];
- enum pipe_shader_type ptarget = st_shader_stage_to_ptarget(stage);
+ enum pipe_shader_type ptarget = pipe_shader_type_from_mesa(stage);
bool have_dround = pscreen->get_shader_param(pscreen, ptarget,
PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED);
bool have_dfrexp = pscreen->get_shader_param(pscreen, ptarget,
continue;
enum pipe_shader_type ptarget =
- st_shader_stage_to_ptarget(shader->Stage);
+ pipe_shader_type_from_mesa(shader->Stage);
enum pipe_shader_ir preferred_ir = (enum pipe_shader_ir)
pscreen->get_shader_param(pscreen, ptarget,
PIPE_SHADER_CAP_PREFERRED_IR);
projects / mesa.git / blobdiff