st_src_reg a, b, c;
st_dst_reg result_dst;
+ // there is no TGSI opcode for this
+ if (ir->type->is_integer_64())
+ return false;
+
ir_expression *expr = ir->operands[mul_operand]->as_expression();
if (!expr || expr->operation != ir_binop_mul)
return false;
case ir_intrinsic_generic_atomic_comp_swap:
case ir_intrinsic_begin_invocation_interlock:
case ir_intrinsic_end_invocation_interlock:
- case ir_intrinsic_begin_fragment_shader_ordering:
unreachable("Invalid intrinsic");
}
}
}
void
-st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
- const ubyte outputMapping[],
- struct pipe_stream_output_info *so)
-{
- if (!glsl_to_tgsi->shader_program->last_vert_prog)
- return;
-
- struct gl_transform_feedback_info *info =
- glsl_to_tgsi->shader_program->last_vert_prog->sh.LinkedTransformFeedback;
- st_translate_stream_output_info2(info, outputMapping, so);
-}
-
-void
-st_translate_stream_output_info2(struct gl_transform_feedback_info *info,
+st_translate_stream_output_info(struct gl_transform_feedback_info *info,
const ubyte outputMapping[],
struct pipe_stream_output_info *so)
{
unsigned i;
+ if (!info) {
+ so->num_outputs = 0;
+ return;
+ }
+
for (i = 0; i < info->NumOutputs; i++) {
so->output[i].register_index =
outputMapping[info->Outputs[i].OutputRegister];