mesa: Introduce a compiler enum for tessellation spacing.

[mesa.git] / src / mesa / state_tracker / st_program.c

diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state_tracker/st_program.c
index 09e8d43479d3ec437a71f133a8dc455971b40a21..96c6bb3fcf8ff8eca426c1c7c2aa2d6a13195ccf 100644 (file)
--- a/src/mesa/state_tracker/st_program.c
+++ b/src/mesa/state_tracker/st_program.c
@@ -242,7 +242,7 @@ st_translate_vertex_program(struct st_context *st,
 
    stvp->num_inputs = 0;
 
-   if (stvp->Base.IsPositionInvariant)
+   if (stvp->Base.arb.IsPositionInvariant)
       _mesa_insert_mvp_code(st->ctx, &stvp->Base);
 
    /*
@@ -250,11 +250,12 @@ st_translate_vertex_program(struct st_context *st,
     * and TGSI generic input indexes, plus input attrib semantic info.
     */
    for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) {
-      if ((stvp->Base.InputsRead & BITFIELD64_BIT(attr)) != 0) {
+      if ((stvp->Base.info.inputs_read & BITFIELD64_BIT(attr)) != 0) {
          input_to_index[attr] = stvp->num_inputs;
          stvp->index_to_input[stvp->num_inputs] = attr;
          stvp->num_inputs++;
-         if ((stvp->Base.DoubleInputsRead & BITFIELD64_BIT(attr)) != 0) {
+         if ((stvp->Base.info.double_inputs_read &
+              BITFIELD64_BIT(attr)) != 0) {
             /* add placeholder for second part of a double attribute */
             stvp->index_to_input[stvp->num_inputs] = ST_DOUBLE_ATTRIB_PLACEHOLDER;
             stvp->num_inputs++;
@@ -268,7 +269,7 @@ st_translate_vertex_program(struct st_context *st,
    /* Compute mapping of vertex program outputs to slots.
     */
    for (attr = 0; attr < VARYING_SLOT_MAX; attr++) {
-      if ((stvp->Base.OutputsWritten & BITFIELD64_BIT(attr)) == 0) {
+      if ((stvp->Base.info.outputs_written & BITFIELD64_BIT(attr)) == 0) {
          stvp->result_to_output[attr] = ~0;
       }
       else {
@@ -389,7 +390,7 @@ st_translate_vertex_program(struct st_context *st,
       stvp->tgsi.type = PIPE_SHADER_IR_NIR;
       stvp->tgsi.ir.nir = nir;
 
-      st_translate_stream_output_info2(&stvp->shader_program->LinkedTransformFeedback,
+      st_translate_stream_output_info2(stvp->shader_program->xfb_program->sh.LinkedTransformFeedback,
                                        stvp->result_to_output,
                                        &stvp->tgsi.stream_output);
       return true;
@@ -614,7 +615,7 @@ st_translate_fragment_program(struct st_context *st,
    /*
     * Convert Mesa program inputs to TGSI input register semantics.
     */
-   inputsRead = stfp->Base.InputsRead;
+   inputsRead = stfp->Base.info.inputs_read;
    for (attr = 0; attr < VARYING_SLOT_MAX; attr++) {
       if ((inputsRead & BITFIELD64_BIT(attr)) != 0) {
          const GLuint slot = fs_num_inputs++;
@@ -753,7 +754,7 @@ st_translate_fragment_program(struct st_context *st,
     * Semantics and mapping for outputs
     */
    {
-      GLbitfield64 outputsWritten = stfp->Base.OutputsWritten;
+      GLbitfield64 outputsWritten = stfp->Base.info.outputs_written;
 
       /* if z is written, emit that first */
       if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
@@ -1225,7 +1226,7 @@ st_translate_program_common(struct st_context *st,
     * Convert Mesa program inputs to TGSI input register semantics.
     */
    for (attr = 0; attr < VARYING_SLOT_MAX; attr++) {
-      if ((prog->InputsRead & BITFIELD64_BIT(attr)) != 0) {
+      if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) != 0) {
          const GLuint slot = num_inputs++;
 
          inputMapping[attr] = slot;
@@ -1302,7 +1303,7 @@ st_translate_program_common(struct st_context *st,
 
    /* Also add patch inputs. */
    for (attr = 0; attr < 32; attr++) {
-      if (prog->PatchInputsRead & (1u << attr)) {
+      if (prog->info.patch_inputs_read & (1u << attr)) {
          GLuint slot = num_inputs++;
          GLuint patch_attr = VARYING_SLOT_PATCH0 + attr;
 
@@ -1324,7 +1325,7 @@ st_translate_program_common(struct st_context *st,
     * mapping and the semantic information for each output.
     */
    for (attr = 0; attr < VARYING_SLOT_MAX; attr++) {
-      if (prog->OutputsWritten & BITFIELD64_BIT(attr)) {
+      if (prog->info.outputs_written & BITFIELD64_BIT(attr)) {
          GLuint slot = num_outputs++;
 
          outputMapping[attr] = slot;
@@ -1426,7 +1427,7 @@ st_translate_program_common(struct st_context *st,
 
    /* Also add patch outputs. */
    for (attr = 0; attr < 32; attr++) {
-      if (prog->PatchOutputsWritten & (1u << attr)) {
+      if (prog->info.patch_outputs_written & (1u << attr)) {
          GLuint slot = num_outputs++;
          GLuint patch_attr = VARYING_SLOT_PATCH0 + attr;
 
@@ -1606,24 +1607,17 @@ st_translate_tesseval_program(struct st_context *st,
       ureg_property(ureg, TGSI_PROPERTY_TES_PRIM_MODE,
                     sttep->Base.info.tes.primitive_mode);
 
-   switch (sttep->Base.info.tes.spacing) {
-   case GL_EQUAL:
-      ureg_property(ureg, TGSI_PROPERTY_TES_SPACING, PIPE_TESS_SPACING_EQUAL);
-      break;
-   case GL_FRACTIONAL_EVEN:
-      ureg_property(ureg, TGSI_PROPERTY_TES_SPACING,
-                    PIPE_TESS_SPACING_FRACTIONAL_EVEN);
-      break;
-   case GL_FRACTIONAL_ODD:
-      ureg_property(ureg, TGSI_PROPERTY_TES_SPACING,
-                    PIPE_TESS_SPACING_FRACTIONAL_ODD);
-      break;
-   default:
-      assert(0);
-   }
+   STATIC_ASSERT((TESS_SPACING_EQUAL + 1) % 3 == PIPE_TESS_SPACING_EQUAL);
+   STATIC_ASSERT((TESS_SPACING_FRACTIONAL_ODD + 1) % 3 ==
+                 PIPE_TESS_SPACING_FRACTIONAL_ODD);
+   STATIC_ASSERT((TESS_SPACING_FRACTIONAL_EVEN + 1) % 3 ==
+                 PIPE_TESS_SPACING_FRACTIONAL_EVEN);
+
+   ureg_property(ureg, TGSI_PROPERTY_TES_SPACING,
+                 (sttep->Base.info.tes.spacing + 1) % 3);
 
    ureg_property(ureg, TGSI_PROPERTY_TES_VERTEX_ORDER_CW,
-                 sttep->Base.info.tes.vertex_order == GL_CW);
+                 !sttep->Base.info.tes.ccw);
    ureg_property(ureg, TGSI_PROPERTY_TES_POINT_MODE,
                  sttep->Base.info.tes.point_mode);