/*
* Mesa 3-D graphics library
- * Version: 6.3
+ * Version: 6.5
*
- * Copyright (C) 1999-2004 Brian Paul All Rights Reserved.
+ * Copyright (C) 1999-2005 Brian Paul All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
/* New, internal instructions:
*/
-#define RSW (VP_MAX_OPCODE)
-#define MSK (VP_MAX_OPCODE+1)
-#define REL (VP_MAX_OPCODE+2)
+#define RSW (MAX_OPCODE)
+#define MSK (MAX_OPCODE+1)
+#define REL (MAX_OPCODE+2)
-#define FILE_REG 0
-#define FILE_LOCAL_PARAM 1
-#define FILE_ENV_PARAM 2
-#define FILE_STATE_PARAM 3
+/**
+ * Register files for vertex programs
+ */
+#define FILE_REG 0 /* temporaries */
+#define FILE_LOCAL_PARAM 1 /* local parameters */
+#define FILE_ENV_PARAM 2 /* global parameters */
+#define FILE_STATE_PARAM 3 /* GL state references */
#define REG_ARG0 0
#define REG_ARG1 1
#define REG_NEG 67 /* -1,-1,-1,-1 */
#define REG_LIT 68 /* 1,0,0,1 */
#define REG_LIT2 69 /* 1,0,0,1 */
-#define REG_SCRATCH 70 /* internal temporary */
+#define REG_SCRATCH 70 /* internal temporary. XXX we can't actually use this because 70 doesn't fit in the 5-bit 'dst' instruction field! */
#define REG_UNDEF 127 /* special case - never used */
#define REG_MAX 128
#define REG_INVALID ~0
/* ARB_vp instructions are broken down into one or more of the
- * following micro-instructions, each representable in a 32 bit packed
+ * following micro-instructions, each representable in a 64 bit packed
* structure.
*/
struct reg {
union instruction {
struct {
- GLuint opcode:6;
+ GLuint opcode:7;
GLuint dst:5;
GLuint file0:2;
GLuint idx0:7;
GLuint file1:2;
GLuint idx1:7;
- GLuint pad:3;
+ GLuint pad:2;
+ GLuint pad2;
} alu;
struct {
- GLuint opcode:6;
+ GLuint opcode:7;
GLuint dst:5;
GLuint file0:2;
GLuint idx0:7;
} rsw;
struct {
- GLuint opcode:6;
+ GLuint opcode:7;
GLuint dst:5;
GLuint file:2;
GLuint idx:7;
GLuint mask:4;
- GLuint pad:1;
+ GLuint pad:7;
+ GLuint pad2;
} msk;
-
- GLuint dword;
};
+
+/**
+ * Reduced swizzle is a 2-bit field; only X/Y/Z/W are allowed, not 0/1.
+ */
#define RSW_NOOP ((0<<0) | (1<<2) | (2<<4) | (3<<6))
#define GET_RSW(swz, idx) (((swz) >> ((idx)*2)) & 0x3)
#endif
-/*!
+/**
* Private storage for the vertex program pipeline stage.
*/
struct arb_vp_machine {
struct input input[_TNL_ATTRIB_MAX];
GLuint nr_inputs;
- struct output output[15];
+ struct output output[VERT_RESULT_MAX];
GLuint nr_outputs;
GLvector4f attribs[VERT_RESULT_MAX]; /**< result vectors. */
GLuint vtx_nr; /**< loop counter */
struct vertex_buffer *VB;
- GLcontext *ctx;
GLshort fpucntl_rnd_neg; /* constant value */
GLshort fpucntl_restore; /* constant value */