} __attribute__((packed));
struct bifrost_tiler_meta {
- u64 zero0;
+ u32 tiler_heap_next_start; /* To be written by the GPU */
+ u32 used_hierarchy_mask; /* To be written by the GPU */
u16 hierarchy_mask; /* Five values observed: 0xa, 0x14, 0x28, 0x50, 0xa0 */
u16 flags;
u16 width;
u16 height;
- u64 zero1;
+ u64 zero0;
mali_ptr tiler_heap_meta;
/* TODO what is this used for? */
u64 zeros[20];
struct bifrost_sampler_descriptor {
uint8_t unk1;
- enum mali_wrap_mode wrap_s : 4;
- enum mali_wrap_mode wrap_t : 4;
enum mali_wrap_mode wrap_r : 4;
+ enum mali_wrap_mode wrap_t : 4;
+ enum mali_wrap_mode wrap_s : 4;
uint8_t unk8 : 4;
- uint8_t unk2 : 3;
- uint8_t min_filter : 1;
+ uint8_t unk2 : 1;
uint8_t norm_coords : 1;
+ uint8_t unk3 : 1;
+ uint8_t min_filter : 1;
uint8_t zero1 : 1;
- uint8_t mip_filter : 1;
uint8_t mag_filter : 1;
+ uint8_t mip_filter : 1;
int16_t min_lod;
int16_t max_lod;
unsigned nr_channels : 2; /* MALI_POSITIVE */
- unsigned unk3 : 5;
+ unsigned unk3 : 4;
+ unsigned unk4 : 1;
enum mali_block_format block : 2;
unsigned flags : 4;