static struct midgard_disasm_stats midg_stats;
+/* Transform an expanded writemask (duplicated 8-bit format) into its condensed
+ * form (one bit per component) */
+
+static inline unsigned
+condense_writemask(unsigned expanded_mask,
+ unsigned bits_per_component)
+{
+ if (bits_per_component == 8) {
+ /* Duplicate every bit to go from 8 to 16-channel wrmask */
+ unsigned omask = 0;
+
+ for (unsigned i = 0; i < 8; ++i) {
+ if (expanded_mask & (1 << i))
+ omask |= (3 << (2 * i));
+ }
+
+ return omask;
+ }
+
+ unsigned slots_per_component = bits_per_component / 16;
+ unsigned max_comp = (16 * 8) / bits_per_component;
+ unsigned condensed_mask = 0;
+
+ for (unsigned i = 0; i < max_comp; i++) {
+ if (expanded_mask & (1 << (i * slots_per_component)))
+ condensed_mask |= (1 << i);
+ }
+
+ return condensed_mask;
+}
+
static void
print_alu_opcode(FILE *fp, midgard_alu_op op)
{
static char *outmod_names_float[4] = {
"",
".pos",
- ".one",
+ ".sat_signed",
".sat"
};
midgard_scalar_alu *alu)
{
midgard_scalar_alu_src *src = (midgard_scalar_alu_src *)&src_binary;
- unsigned mod = 0;
-
assert(consts != NULL);
- if (!midgard_is_integer_op(alu->op)) {
- if (src->abs)
- mod |= MIDGARD_FLOAT_MOD_ABS;
- if (src->negate)
- mod |= MIDGARD_FLOAT_MOD_NEG;
- } else {
- mod = midgard_int_normal;
- }
-
fprintf(fp, "#");
mir_print_constant_component(fp, consts, src->component,
src->full ?
midgard_reg_mode_32 : midgard_reg_mode_16,
- false, mod, alu->op);
+ false, src->mod, alu->op);
}
static void
{
midgard_vector_alu_src *src = (midgard_vector_alu_src *)&src_binary;
unsigned bits = bits_for_mode_halved(alu->reg_mode, src->half);
- unsigned max_comp = MIN2((sizeof(*consts) * 8) / bits, 8);
+ unsigned max_comp = (sizeof(*consts) * 8) / bits;
unsigned comp_mask, num_comp = 0;
assert(consts);
+ assert(max_comp <= 16);
- comp_mask = effective_writemask(alu, condense_writemask(alu->mask, bits));
+ comp_mask = effective_writemask(alu->op, condense_writemask(alu->mask, bits));
num_comp = util_bitcount(comp_mask);
- fprintf(fp, "#");
- if (num_comp > 1)
- fprintf(fp, "vec%d(", num_comp);
-
+ fprintf(fp, "<");
bool first = true;
for (unsigned i = 0; i < max_comp; ++i) {
unsigned c = (src->swizzle >> (i * 2)) & 3;
+ if (bits == 16 && !src->half) {
+ if (i < 4)
+ c += (src->rep_high * 4);
+ else
+ c += (!src->rep_low * 4);
+ } else if (bits == 32 && !src->half) {
+ /* Implicitly ok */
+ } else if (bits == 8) {
+ assert (!src->half);
+ unsigned index = (i >> 1) & 3;
+ unsigned base = (src->swizzle >> (index * 2)) & 3;
+ c = base * 2;
+
+ if (i < 8)
+ c += (src->rep_high) * 8;
+ else
+ c += (!src->rep_low) * 8;
+
+ /* We work on twos, actually */
+ if (i & 1)
+ c++;
+ } else {
+ printf(" (%d%d%d)", src->rep_low, src->rep_high, src->half);
+ }
+
if (first)
first = false;
else
}
if (num_comp > 1)
- fprintf(fp, ")");
+ fprintf(fp, ">");
}
static void
-print_vector_src(FILE *fp, unsigned src_binary,
- midgard_reg_mode mode, unsigned reg,
- midgard_dest_override override, bool is_int)
+print_srcmod(FILE *fp, bool is_int, unsigned mod, bool scalar)
{
- midgard_vector_alu_src *src = (midgard_vector_alu_src *)&src_binary;
-
/* Modifiers change meaning depending on the op's context */
- midgard_int_mod int_mod = src->mod;
+ midgard_int_mod int_mod = mod;
if (is_int) {
+ if (scalar && mod == 2) {
+ fprintf(fp, "unk2");
+ }
+
fprintf(fp, "%s", srcmod_names_int[int_mod]);
} else {
- if (src->mod & MIDGARD_FLOAT_MOD_NEG)
+ if (mod & MIDGARD_FLOAT_MOD_NEG)
fprintf(fp, "-");
- if (src->mod & MIDGARD_FLOAT_MOD_ABS)
+ if (mod & MIDGARD_FLOAT_MOD_ABS)
fprintf(fp, "abs(");
}
+}
+
+static void
+print_srcmod_end(FILE *fp, bool is_int, unsigned mod, unsigned bits)
+{
+ /* Since we wrapped with a function-looking thing */
+
+ if (is_int && mod == midgard_int_shift)
+ fprintf(fp, ") << %u", bits);
+ else if ((is_int && (mod != midgard_int_normal))
+ || (!is_int && mod & MIDGARD_FLOAT_MOD_ABS))
+ fprintf(fp, ")");
+}
+
+static void
+print_vector_src(FILE *fp, unsigned src_binary,
+ midgard_reg_mode mode, unsigned reg,
+ midgard_dest_override override, bool is_int)
+{
+ midgard_vector_alu_src *src = (midgard_vector_alu_src *)&src_binary;
+ print_srcmod(fp, is_int, src->mod, false);
//register
unsigned bits = bits_for_mode_halved(mode, src->half);
print_swizzle_vec2(fp, src->swizzle, src->rep_high, src->rep_low, src->half);
}
- /* Since we wrapped with a function-looking thing */
-
- if (is_int && int_mod == midgard_int_shift)
- fprintf(fp, ") << %u", bits);
- else if ((is_int && (int_mod != midgard_int_normal))
- || (!is_int && src->mod & MIDGARD_FLOAT_MOD_ABS))
- fprintf(fp, ")");
+ print_srcmod_end(fp, is_int, src->mod, bits);
}
static uint16_t
fprintf(fp, "/* do%u */ ", override);
}
+ /* Instructions like fdot4 do *not* replicate, ensure the
+ * mask is of only a single component */
+
+ unsigned rep = GET_CHANNEL_COUNT(alu_opcode_props[alu_field->op].props);
+
+ if (rep) {
+ unsigned comp_mask = condense_writemask(mask, bits_for_mode(mode));
+ unsigned num_comp = util_bitcount(comp_mask);
+ if (num_comp != 1)
+ fprintf(fp, "/* err too many components */");
+ }
print_mask(fp, mask, bits_for_mode(mode), override);
fprintf(fp, ", ");
}
static void
-print_scalar_src(FILE *fp, unsigned src_binary, unsigned reg)
+print_scalar_src(FILE *fp, bool is_int, unsigned src_binary, unsigned reg)
{
midgard_scalar_alu_src *src = (midgard_scalar_alu_src *)&src_binary;
- if (src->negate)
- fprintf(fp, "-");
-
- if (src->abs)
- fprintf(fp, "abs(");
-
+ print_srcmod(fp, is_int, src->mod, true);
print_reg(fp, reg, src->full ? 32 : 16);
unsigned c = src->component;
fprintf(fp, ".%c", components[c]);
- if (src->abs)
- fprintf(fp, ")");
-
+ print_srcmod_end(fp, is_int, src->mod, src->full ? 32 : 16);
}
static uint16_t
update_dest(reg_info->out_reg);
print_reg(fp, reg_info->out_reg, full ? 32 : 16);
unsigned c = alu_field->output_component;
+ bool is_int = midgard_is_integer_op(alu_field->op);
if (full) {
assert((c & 1) == 0);
if (reg_info->src1_reg == 26)
print_scalar_constant(fp, alu_field->src1, consts, alu_field);
else
- print_scalar_src(fp, alu_field->src1, reg_info->src1_reg);
+ print_scalar_src(fp, is_int, alu_field->src1, reg_info->src1_reg);
fprintf(fp, ", ");
} else if (reg_info->src2_reg == 26) {
print_scalar_constant(fp, alu_field->src2, consts, alu_field);
} else
- print_scalar_src(fp, alu_field->src2, reg_info->src2_reg);
+ print_scalar_src(fp, is_int, alu_field->src2, reg_info->src2_reg);
midg_stats.instruction_count++;
fprintf(fp, "\n");
if (param.interpolation != midgard_interp_default) {
if (param.interpolation == midgard_interp_centroid)
fprintf(fp, ".centroid");
+ else if (param.interpolation == midgard_interp_sample)
+ fprintf(fp, ".sample");
else
fprintf(fp, ".interp%d", param.interpolation);
}
fprintf(fp, ".");
switch (format) {
- DEFINE_CASE(MALI_TEX_1D, "1d");
- DEFINE_CASE(MALI_TEX_2D, "2d");
- DEFINE_CASE(MALI_TEX_3D, "3d");
- DEFINE_CASE(MALI_TEX_CUBE, "cube");
+ DEFINE_CASE(1, "1d");
+ DEFINE_CASE(2, "2d");
+ DEFINE_CASE(3, "3d");
+ DEFINE_CASE(0, "cube");
default:
unreachable("Bad format");
if (texture->last)
fprintf(fp, ".last");
- if (texture->barrier_buffer)
- fprintf(fp, ".barrier_buffer /* XXX */");
-
- if (texture->barrier_shared)
- fprintf(fp, ".barrier_shared /* XXX */");
+ if (texture->out_of_order)
+ fprintf(fp, ".ooo%u", texture->out_of_order);
/* Output modifiers are always interpreted floatly */
print_outmod(fp, texture->outmod, false);
fprintf(fp, " /* bias_int = 0x%X */", texture->bias_int);
} else if (texture->op == TEXTURE_OP_TEXEL_FETCH) {
/* For texel fetch, the int LOD is in the fractional place and
- * there is no fraction / possibility of bias. We *always* have
- * an explicit LOD, even if it's zero. */
+ * there is no fraction. We *always* have an explicit LOD, even
+ * if it's zero. */
if (texture->bias_int)
fprintf(fp, " /* bias_int = 0x%X */ ", texture->bias_int);
projects / mesa.git / blobdiff