pan/decode: Drop legacy 32-bit job support

[mesa.git] / src / panfrost / midgard / midgard_address.c

diff --git a/src/panfrost/midgard/midgard_address.c b/src/panfrost/midgard/midgard_address.c
index c0d1777551708b975796dafcfeeba95dfa50364d..2f57c3464a742f0ee41841e81b973028ba854fc2 100644 (file)
--- a/src/panfrost/midgard/midgard_address.c
+++ b/src/panfrost/midgard/midgard_address.c
@@ -45,6 +45,20 @@ struct mir_address {
         unsigned bias;
 };
 
+static bool
+mir_args_ssa(nir_ssa_scalar s, unsigned count)
+{
+        nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
+        assert(count <= nir_op_infos[alu->op].num_inputs);
+
+        for (unsigned i = 0; i < count; ++i) {
+                if (!alu->src[i].src.is_ssa)
+                        return false;
+        }
+
+        return true;
+}
+
 /* Matches a constant in either slot and moves it to the bias */
 
 static void
@@ -69,6 +83,9 @@ mir_match_iadd(struct mir_address *address, bool first_free)
         if (!address->B.def || !nir_ssa_scalar_is_alu(address->B))
                 return;
 
+        if (!mir_args_ssa(address->B, 2))
+                return;
+
         nir_op op = nir_ssa_scalar_alu_op(address->B);
 
         if (op != nir_op_iadd) return;
@@ -96,6 +113,9 @@ mir_match_u2u64(struct mir_address *address)
         if (!address->B.def || !nir_ssa_scalar_is_alu(address->B))
                 return;
 
+        if (!mir_args_ssa(address->B, 1))
+                return;
+
         nir_op op = nir_ssa_scalar_alu_op(address->B);
         if (op != nir_op_u2u64) return;
         nir_ssa_scalar arg = nir_ssa_scalar_chase_alu_src(address->B, 0);
@@ -112,6 +132,9 @@ mir_match_ishl(struct mir_address *address)
         if (!address->B.def || !nir_ssa_scalar_is_alu(address->B))
                 return;
 
+        if (!mir_args_ssa(address->B, 2))
+                return;
+
         nir_op op = nir_ssa_scalar_alu_op(address->B);
         if (op != nir_op_ishl) return;
         nir_ssa_scalar op1 = nir_ssa_scalar_chase_alu_src(address->B, 0);
@@ -134,14 +157,14 @@ mir_match_mov(struct mir_address *address)
         if (address->A.def && nir_ssa_scalar_is_alu(address->A)) {
                 nir_op op = nir_ssa_scalar_alu_op(address->A);
 
-                if (op == nir_op_mov)
+                if (op == nir_op_mov && mir_args_ssa(address->A, 1))
                         address->A = nir_ssa_scalar_chase_alu_src(address->A, 0);
         }
 
         if (address->B.def && nir_ssa_scalar_is_alu(address->B)) {
                 nir_op op = nir_ssa_scalar_alu_op(address->B);
 
-                if (op == nir_op_mov)
+                if (op == nir_op_mov && mir_args_ssa(address->B, 1))
                         address->B = nir_ssa_scalar_chase_alu_src(address->B, 0);
         }
 }
@@ -175,10 +198,16 @@ mir_set_offset(compiler_context *ctx, midgard_instruction *ins, nir_src *offset,
                 ins->swizzle[2][i] = 0;
         }
 
+        bool force_zext = (nir_src_bit_size(*offset) < 64);
+
         if (!offset->is_ssa) {
                 ins->load_store.arg_1 |= is_shared ? 0x6E : 0x7E;
                 ins->src[2] = nir_src_index(ctx, offset);
                 ins->src_types[2] = nir_type_uint | nir_src_bit_size(*offset);
+
+                if (force_zext)
+                        ins->load_store.arg_1 |= 0x80;
+
                 return;
         }
 
@@ -198,7 +227,7 @@ mir_set_offset(compiler_context *ctx, midgard_instruction *ins, nir_src *offset,
         } else
                 ins->load_store.arg_2 = 0x1E;
 
-        if (match.zext)
+        if (match.zext || force_zext)
                 ins->load_store.arg_1 |= 0x80;
 
         assert(match.shift <= 7);