pan/mdg: Implement gl_SampleID

[mesa.git] / src / panfrost / midgard / midgard_derivatives.c

diff --git a/src/panfrost/midgard/midgard_derivatives.c b/src/panfrost/midgard/midgard_derivatives.c
index 3a36965f28bb0203fe281707ddaed635bdec2bda..5c01ebaf64a0cd0746923350742c69e739e165f2 100644 (file)
--- a/src/panfrost/midgard/midgard_derivatives.c
+++ b/src/panfrost/midgard/midgard_derivatives.c
@@ -72,12 +72,19 @@ mir_derivative_op(nir_op op)
  * implicitly */
 
 bool
-mir_op_computes_derivatives(unsigned op)
+mir_op_computes_derivatives(gl_shader_stage stage, unsigned op)
 {
+        /* Only fragment shaders may compute derivatives, but the sense of
+         * "normal" changes in vertex shaders on certain GPUs */
+
+        if (op == TEXTURE_OP_NORMAL && stage != MESA_SHADER_FRAGMENT)
+                return false;
+
         switch (op) {
         case TEXTURE_OP_NORMAL:
         case TEXTURE_OP_DFDX:
         case TEXTURE_OP_DFDY:
+                assert(stage == MESA_SHADER_FRAGMENT);
                 return true;
         default:
                 return false;
@@ -94,17 +101,14 @@ midgard_emit_derivatives(compiler_context *ctx, nir_alu_instr *instr)
         midgard_instruction ins = {
                 .type = TAG_TEXTURE_4,
                 .mask = mask_of(nr_components),
-                .ssa_args = {
-                        .dest = nir_dest_index(ctx, &instr->dest.dest),
-                        .src0 = nir_alu_src_index(ctx, &instr->src[0]),
-                        .src1 = -1,
-                },
+                .dest = nir_dest_index(&instr->dest.dest),
+                .dest_type = nir_type_float32,
+                .src = { ~0, nir_src_index(ctx, &instr->src[0].src), ~0, ~0 },
+                .swizzle = SWIZZLE_IDENTITY_4,
+                .src_types = { nir_type_float32, nir_type_float32 },
                 .texture = {
                         .op = mir_derivative_op(instr->op),
                         .format = MALI_TEX_2D,
-                        .swizzle = SWIZZLE_XYXX,
-                        .in_reg_swizzle = SWIZZLE_XYXX,
-
                         .in_reg_full = 1,
                         .out_full = 1,
                         .sampler_type = MALI_SAMPLER_FLOAT,
@@ -115,9 +119,6 @@ midgard_emit_derivatives(compiler_context *ctx, nir_alu_instr *instr)
                 ins.mask &= instr->dest.write_mask;
 
         emit_mir_instruction(ctx, ins);
-
-        /* TODO: Set .cont/.last automatically via dataflow analysis */
-        ctx->texture_op_count++;
 }
 
 void
@@ -145,21 +146,19 @@ midgard_lower_derivatives(compiler_context *ctx, midgard_block *block)
                 dup.mask &= 0b1100;
 
                 /* Fixup swizzles */
-                assert(ins->texture.swizzle == SWIZZLE_XYXX);
-                assert(ins->texture.in_reg_swizzle == SWIZZLE_XYXX);
-                dup.texture.swizzle = SWIZZLE_XXXY;
-                dup.texture.in_reg_swizzle = SWIZZLE_ZWWW;
+                dup.swizzle[0][0] = dup.swizzle[0][1] = dup.swizzle[0][2] = COMPONENT_X;
+                dup.swizzle[0][3] = COMPONENT_Y;
 
-                /* Insert the new instruction */
-                mir_insert_instruction_before(mir_next_op(ins), dup);
+                dup.swizzle[1][0] = COMPONENT_Z;
+                dup.swizzle[1][1] = dup.swizzle[1][2] = dup.swizzle[1][3] = COMPONENT_W;
 
-                /* TODO: Set .cont/.last automatically via dataflow analysis */
-                ctx->texture_op_count++;
+                /* Insert the new instruction */
+                mir_insert_instruction_before(ctx, mir_next_op(ins), dup);
 
                 /* We'll need both instructions to write to the same index, so
                  * rewrite to use a register */
 
                 unsigned new = make_compiler_temp_reg(ctx);
-                mir_rewrite_index(ctx, ins->ssa_args.dest, new);
+                mir_rewrite_index(ctx, ins->dest, new);
         }
 }