pan/midgard: Fix disassembler cycle/quadword counting

[mesa.git] / src / panfrost / midgard / midgard_opt_perspective.c

diff --git a/src/panfrost/midgard/midgard_opt_perspective.c b/src/panfrost/midgard/midgard_opt_perspective.c
index 22b7736a379766531c60ce3d9c1de53db4c9d9e3..488beadcbfbfd48c88e3dabe1e80b81ef1db7cdb 100644 (file)
--- a/src/panfrost/midgard/midgard_opt_perspective.c
+++ b/src/panfrost/midgard/midgard_opt_perspective.c
@@ -37,6 +37,16 @@
 
 #include "compiler.h"
 
+static bool
+is_swizzle_0(unsigned *swizzle)
+{
+        for (unsigned c = 0; c < MIR_VEC_COMPONENTS; ++c)
+                if (swizzle[c])
+                        return false;
+
+        return true;
+}
+
 bool
 midgard_opt_combine_projection(compiler_context *ctx, midgard_block *block)
 {
@@ -51,18 +61,12 @@ midgard_opt_combine_projection(compiler_context *ctx, midgard_block *block)
 
                 /* Check the swizzles */
                 
-                midgard_vector_alu_src src1 =
-                        vector_alu_from_unsigned(ins->alu.src1);
-
-                midgard_vector_alu_src src2 =
-                        vector_alu_from_unsigned(ins->alu.src2);
-
-                if (!mir_is_simple_swizzle(src1.swizzle, ins->mask)) continue;
-                if (src2.swizzle != SWIZZLE_XXXX) continue;
+                if (!mir_is_simple_swizzle(ins->swizzle[0], ins->mask)) continue;
+                if (!is_swizzle_0(ins->swizzle[1])) continue;
 
                 /* Awesome, we're the right form. Now check where src2 is from */
-                unsigned frcp = ins->ssa_args.src[1];
-                unsigned to = ins->ssa_args.dest;
+                unsigned frcp = ins->src[1];
+                unsigned to = ins->dest;
 
                 if (frcp & IS_REG) continue;
                 if (to & IS_REG) continue;
@@ -72,13 +76,10 @@ midgard_opt_combine_projection(compiler_context *ctx, midgard_block *block)
                 unsigned frcp_from = 0;
 
                 mir_foreach_instr_in_block_safe(block, sub) {
-                        if (sub->ssa_args.dest != frcp) continue;
-
-                        midgard_vector_alu_src s =
-                                vector_alu_from_unsigned(sub->alu.src1);
+                        if (sub->dest != frcp) continue;
 
-                        frcp_component = s.swizzle & 3;
-                        frcp_from = sub->ssa_args.src[0];
+                        frcp_component = sub->swizzle[0][0];
+                        frcp_from = sub->src[0];
 
                         frcp_found =
                                 (sub->type == TAG_ALU_4) &&
@@ -98,7 +99,7 @@ midgard_opt_combine_projection(compiler_context *ctx, midgard_block *block)
                 if (mir_use_count(ctx, frcp_from) > 2) continue;
 
                 mir_foreach_instr_in_block_safe(block, v) {
-                        if (v->ssa_args.dest != frcp_from) continue;
+                        if (v->dest != frcp_from) continue;
                         if (v->type != TAG_LOAD_STORE_4) break;
                         if (!OP_IS_LOAD_VARY_F(v->load_store.op)) break;
 
@@ -114,20 +115,18 @@ midgard_opt_combine_projection(compiler_context *ctx, midgard_block *block)
                 midgard_instruction accel = {
                         .type = TAG_LOAD_STORE_4,
                         .mask = ins->mask,
-                        .ssa_args = {
-                                .dest = to,
-                                .src = { frcp_from, ~0, ~0 },
-                        },
+                        .dest = to,
+                        .src = { frcp_from, ~0, ~0, ~0 },
+                        .swizzle = SWIZZLE_IDENTITY_4,
                         .load_store = {
                                 .op = frcp_component == COMPONENT_W ?
                                         midgard_op_ldst_perspective_division_w : 
                                         midgard_op_ldst_perspective_division_z,
-                                .swizzle = SWIZZLE_XYZW,
                                 .arg_1 = 0x20
                         }
                 };
 
-                mir_insert_instruction_before(ins, accel);
+                mir_insert_instruction_before(ctx, ins, accel);
                 mir_remove_instruction(ins);
 
                 progress |= true;
@@ -146,8 +145,8 @@ midgard_opt_varying_projection(compiler_context *ctx, midgard_block *block)
                 if (ins->type != TAG_LOAD_STORE_4) continue;
                 if (!OP_IS_PROJECTION(ins->load_store.op)) continue;
 
-                unsigned vary = ins->ssa_args.src[0];
-                unsigned to = ins->ssa_args.dest;
+                unsigned vary = ins->src[0];
+                unsigned to = ins->dest;
 
                 if (vary & IS_REG) continue;
                 if (to & IS_REG) continue;
@@ -158,7 +157,7 @@ midgard_opt_varying_projection(compiler_context *ctx, midgard_block *block)
                 bool rewritten = false;
 
                 mir_foreach_instr_in_block_safe(block, v) {
-                        if (v->ssa_args.dest != vary) continue;
+                        if (v->dest != vary) continue;
                         if (v->type != TAG_LOAD_STORE_4) break;
                         if (!OP_IS_LOAD_VARY_F(v->load_store.op)) break;
 
@@ -184,7 +183,7 @@ midgard_opt_varying_projection(compiler_context *ctx, midgard_block *block)
                         v->load_store.varying_parameters = param;
 
                         /* Use the new destination */
-                        v->ssa_args.dest = to;
+                        v->dest = to;
 
                         rewritten = true;
                         break;