panfrost: Build midgard_pack.h via meson

[mesa.git] / src / panfrost / midgard / midgard_quirks.h

diff --git a/src/panfrost/midgard/midgard_quirks.h b/src/panfrost/midgard/midgard_quirks.h
index d076605a3dbc3780a05374d2ab280f2df11a5b07..d90d59f76770dc830fb711644eb3aa601b17ea10 100644 (file)
--- a/src/panfrost/midgard/midgard_quirks.h
+++ b/src/panfrost/midgard/midgard_quirks.h
@@ -48,23 +48,51 @@
 
 #define MIDGARD_OLD_BLEND (1 << 2)
 
+/* Errata causing the LOD clamps and bias in the sampler descriptor to be
+ * ignored. This errata affects the command stream but uses a compiler
+ * workaround (applying the clamps/bias manually in the shader. Corresponds in
+ * BASE_HW_ISSUE_10471 in kbase, described as "TEXGRD doesn't honor Sampler
+ * Descriptor LOD clamps nor bias". (I'm assuming TEXGRD is what we call
+ * textureLod) */
+
+#define MIDGARD_BROKEN_LOD (1 << 3)
+
+/* Don't use upper ALU tags for writeout (if you do, you'll get a
+ * INSTR_INVALID_ENC). It's not clear to me what these tags are for. */
+
+#define MIDGARD_NO_UPPER_ALU (1 << 4)
+
+/* Whether (texture) out-of-order execution support is missing on early
+ * Midgards. For these just set the OoO bits to 0. */
+
+#define MIDGARD_NO_OOO (1 << 5)
+
 static inline unsigned
 midgard_get_quirks(unsigned gpu_id)
 {
         switch (gpu_id) {
         case 0x600:
         case 0x620:
-                return MIDGARD_OLD_BLEND;
+                return MIDGARD_OLD_BLEND |
+                        MIDGARD_BROKEN_LOD |
+                        MIDGARD_NO_UPPER_ALU |
+                        MIDGARD_NO_OOO;
 
         case 0x720:
                 return MIDGARD_INTERPIPE_REG_ALIASING | 
-                        MIDGARD_OLD_BLEND;
+                        MIDGARD_OLD_BLEND |
+                        MIDGARD_BROKEN_LOD |
+                        MIDGARD_NO_UPPER_ALU |
+                        MIDGARD_NO_OOO;
 
         case 0x820:
         case 0x830:
                 return MIDGARD_INTERPIPE_REG_ALIASING;
 
         case 0x750:
+                return MIDGARD_EXPLICIT_LOD |
+                        MIDGARD_NO_UPPER_ALU;
+
         case 0x860:
         case 0x880:
                 return MIDGARD_EXPLICIT_LOD;