mir_foreach_instr_global(ctx, ins) {
mir_rewrite_index_dst_single(ins, old, new);
}
+
+ /* Implicitly written before the shader */
+ if (ctx->blend_input == old)
+ ctx->blend_input = new;
+
+ if (ctx->blend_src1 == old)
+ ctx->blend_src1 = new;
}
void
bool
mir_nontrivial_mod(midgard_instruction *ins, unsigned i, bool check_swizzle)
{
- bool is_int = midgard_is_integer_op(ins->alu.op);
+ bool is_int = midgard_is_integer_op(ins->op);
if (is_int) {
if (ins->src_shift[i]) return true;
bool
mir_nontrivial_outmod(midgard_instruction *ins)
{
- bool is_int = midgard_is_integer_op(ins->alu.op);
- unsigned mod = ins->alu.outmod;
+ bool is_int = midgard_is_integer_op(ins->op);
+ unsigned mod = ins->outmod;
if (ins->dest_type != ins->src_types[1])
return true;
uint16_t
mir_bytemask_of_read_components_index(midgard_instruction *ins, unsigned i)
{
- if (ins->compact_branch && ins->writeout && (i == 0)) {
- /* Non-ZS writeout uses all components */
- if (!ins->writeout_depth && !ins->writeout_stencil)
- return 0xFFFF;
-
- /* For ZS-writeout, if both Z and S are written we need two
- * components, otherwise we only need one.
- */
- if (ins->writeout_depth && ins->writeout_stencil)
- return 0xFF;
- else
- return 0xF;
- }
-
/* Conditional branches read one 32-bit component = 4 bytes (TODO: multi branch??) */
if (ins->compact_branch && ins->branch.conditional && (i == 0))
return 0xF;
/* ALU ops act componentwise so we need to pay attention to
* their mask. Texture/ldst does not so we don't clamp source
* readmasks based on the writemask */
- unsigned qmask = (ins->type == TAG_ALU_4) ? ins->mask : ~0;
+ unsigned qmask = ~0;
/* Handle dot products and things */
if (ins->type == TAG_ALU_4 && !ins->compact_branch) {
- unsigned props = alu_opcode_props[ins->alu.op].props;
+ unsigned props = alu_opcode_props[ins->op].props;
unsigned channel_override = GET_CHANNEL_COUNT(props);
if (channel_override)
qmask = mask_of(channel_override);
+ else
+ qmask = ins->mask;
}
return mir_bytemask_of_read_components_single(ins->swizzle[i], qmask,
};
if (bundle.tag == TAG_ALU_4) {
- assert(OP_IS_MOVE(u->alu.op));
+ assert(OP_IS_MOVE(u->op));
u->unit = UNIT_VMUL;
size_t bytes_emitted = sizeof(uint32_t) + sizeof(midgard_reg_info) + sizeof(midgard_vector_alu);
assert(ins->type == TAG_ALU_4);
- temp = ins->alu.src1;
- ins->alu.src1 = ins->alu.src2;
- ins->alu.src2 = temp;
-
temp = ins->src_types[0];
ins->src_types[0] = ins->src_types[1];
ins->src_types[1] = temp;