+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
# Copyright (c) 2004-2006 The Regents of The University of Michigan
# Copyright (c) 2010 Advanced Micro Devices, Inc.
# All rights reserved.
#
# Authors: Steve Reinhardt
# Nathan Binkert
+# Andreas Hansson
import sys
from types import FunctionType, MethodType, ModuleType
-try:
- import pydot
-except:
- pydot = False
-
import m5
from m5.util import *
# There are a few things we need that aren't in params.__all__ since
# normal users don't need them
from m5.params import ParamDesc, VectorParamDesc, \
- isNullPointer, SimObjectVector
+ isNullPointer, SimObjectVector, Port
from m5.proxy import *
from m5.proxy import isproxy
# dict to look up SimObjects based on path
instanceDict = {}
+# Did any of the SimObjects lack a header file?
+noCxxHeader = False
+
def public_value(key, value):
return key.startswith('_') or \
isinstance(value, (FunctionType, MethodType, ModuleType,
init_keywords = { 'abstract' : bool,
'cxx_class' : str,
'cxx_type' : str,
- 'type' : str }
+ 'cxx_header' : str,
+ 'type' : str,
+ 'cxx_bases' : list }
# Attributes that can be set any time
keywords = { 'check' : FunctionType }
value_dict[key] = val
if 'abstract' not in value_dict:
value_dict['abstract'] = False
+ if 'cxx_bases' not in value_dict:
+ value_dict['cxx_bases'] = []
cls_dict['_value_dict'] = value_dict
cls = super(MetaSimObject, mcls).__new__(mcls, name, bases, cls_dict)
if 'type' in value_dict:
cls._port_refs = multidict() # port ref objects
cls._instantiated = False # really instantiated, cloned, or subclassed
- # We don't support multiple inheritance. If you want to, you
- # must fix multidict to deal with it properly.
- if len(bases) > 1:
- raise TypeError, "SimObjects do not support multiple inheritance"
+ # We don't support multiple inheritance of sim objects. If you want
+ # to, you must fix multidict to deal with it properly. Non sim-objects
+ # are ok, though
+ bTotal = 0
+ for c in bases:
+ if isinstance(c, MetaSimObject):
+ bTotal += 1
+ if bTotal > 1:
+ raise TypeError, "SimObjects do not support multiple inheritance"
base = bases[0]
cls._value_dict['cxx_type'] = '%s *' % cls._value_dict['cxx_class']
+ if 'cxx_header' not in cls._value_dict:
+ global noCxxHeader
+ noCxxHeader = True
+ print >> sys.stderr, \
+ "warning: No header file specified for SimObject: %s" % name
+
# Export methods are automatically inherited via C++, so we
# don't want the method declarations to get inherited on the
# python side (and thus end up getting repeated in the wrapped
assert(not hasattr(port, 'name'))
port.name = name
cls._ports[name] = port
- if hasattr(port, 'default'):
- cls._cls_get_port_ref(name).connect(port.default)
# same as _get_port_ref, effectively, but for classes
def _cls_get_port_ref(cls, attr):
# will also be inherited from the base class's param struct
# here).
params = cls._params.local.values()
+ ports = cls._ports.local
code('%module(package="m5.internal") param_$cls')
code()
code('%{')
+ code('#include "sim/sim_object.hh"')
code('#include "params/$cls.hh"')
for param in params:
param.cxx_predecls(code)
+ code('#include "${{cls.cxx_header}}"')
cls.export_method_cxx_predecls(code)
+ code('''\
+/**
+ * This is a workaround for bug in swig. Prior to gcc 4.6.1 the STL
+ * headers like vector, string, etc. used to automatically pull in
+ * the cstddef header but starting with gcc 4.6.1 they no longer do.
+ * This leads to swig generated a file that does not compile so we
+ * explicitly include cstddef. Additionally, including version 2.0.4,
+ * swig uses ptrdiff_t without the std:: namespace prefix which is
+ * required with gcc 4.6.1. We explicitly provide access to it.
+ */
+#include <cstddef>
+using std::ptrdiff_t;
+''')
code('%}')
code()
code('%nodefault $classname;')
code('class $classname')
if cls._base:
- code(' : public ${{cls._base.cxx_class}}')
+ bases = [ cls._base.cxx_class ] + cls.cxx_bases
+ else:
+ bases = cls.cxx_bases
+ base_first = True
+ for base in bases:
+ if base_first:
+ code(' : public ${{base}}')
+ base_first = False
+ else:
+ code(' , public ${{base}}')
+
code('{')
code(' public:')
cls.export_methods(code)
# will also be inherited from the base class's param struct
# here).
params = cls._params.local.values()
+ ports = cls._ports.local
try:
ptypes = [p.ptype for p in params]
except:
#include <string>
-struct EventQueue;
+class EventQueue;
''')
for param in params:
param.cxx_predecls(code)
+ for port in ports.itervalues():
+ port.cxx_predecls(code)
code()
if cls._base:
''')
for param in params:
param.cxx_decl(code)
+ for port in ports.itervalues():
+ port.cxx_decl(code)
+
code.dedent()
code('};')
__metaclass__ = MetaSimObject
type = 'SimObject'
abstract = True
+ cxx_header = "sim/sim_object.hh"
- @classmethod
- def export_method_cxx_predecls(cls, code):
- code('''
-#include <Python.h>
-
-#include "sim/serialize.hh"
-#include "sim/sim_object.hh"
-''')
+ cxx_bases = [ "Drainable", "Serializable" ]
@classmethod
def export_method_swig_predecls(cls, code):
code('''
%include <std_string.i>
+
+%import "python/swig/drain.i"
+%import "python/swig/serialize.i"
''')
@classmethod
def export_methods(cls, code):
code('''
- enum State {
- Running,
- Draining,
- Drained
- };
-
void init();
void loadState(Checkpoint *cp);
void initState();
void regStats();
- void regFormulas();
void resetStats();
void startup();
-
- unsigned int drain(Event *drain_event);
- void resume();
- void switchOut();
- void takeOverFrom(BaseCPU *cpu);
''')
# Initialize new instance. For objects with SimObject-valued
# If the attribute exists on the C++ object, transparently
# forward the reference there. This is typically used for
# SWIG-wrapped methods such as init(), regStats(),
- # regFormulas(), resetStats(), startup(), drain(), and
+ # resetStats(), startup(), drain(), and
# resume().
if self._ccObject and hasattr(self._ccObject, attr):
return getattr(self._ccObject, attr)
all = {}
# search children
for child in self._children.itervalues():
- if isinstance(child, ptype) and not isproxy(child) and \
- not isNullPointer(child):
- all[child] = True
+ # a child could be a list, so ensure we visit each item
+ if isinstance(child, list):
+ children = child
+ else:
+ children = [child]
+
+ for child in children:
+ if isinstance(child, ptype) and not isproxy(child) and \
+ not isNullPointer(child):
+ all[child] = True
+ if isSimObject(child):
+ # also add results from the child itself
+ child_all, done = child.find_all(ptype)
+ all.update(dict(zip(child_all, [done] * len(child_all))))
# search param space
for pname,pdesc in self._params.iteritems():
if issubclass(pdesc.ptype, ptype):
if hasattr(self, 'type'):
print >>ini_file, 'type=%s' % self.type
- child_names = self._children.keys()
- child_names.sort()
- if len(child_names):
+ if len(self._children.keys()):
print >>ini_file, 'children=%s' % \
- ' '.join(self._children[n].get_name() for n in child_names)
+ ' '.join(self._children[n].get_name() \
+ for n in sorted(self._children.keys()))
- param_names = self._params.keys()
- param_names.sort()
- for param in param_names:
+ for param in sorted(self._params.keys()):
value = self._values.get(param)
if value != None:
print >>ini_file, '%s=%s' % (param,
self._values[param].ini_str())
- port_names = self._ports.keys()
- port_names.sort()
- for port_name in port_names:
+ for port_name in sorted(self._ports.keys()):
port = self._port_refs.get(port_name, None)
if port != None:
print >>ini_file, '%s=%s' % (port_name, port.ini_str())
print >>ini_file # blank line between objects
+ # generate a tree of dictionaries expressing all the parameters in the
+ # instantiated system for use by scripts that want to do power, thermal
+ # visualization, and other similar tasks
+ def get_config_as_dict(self):
+ d = attrdict()
+ if hasattr(self, 'type'):
+ d.type = self.type
+ if hasattr(self, 'cxx_class'):
+ d.cxx_class = self.cxx_class
+ # Add the name and path of this object to be able to link to
+ # the stats
+ d.name = self.get_name()
+ d.path = self.path()
+
+ for param in sorted(self._params.keys()):
+ value = self._values.get(param)
+ if value != None:
+ try:
+ # Use native type for those supported by JSON and
+ # strings for everything else. skipkeys=True seems
+ # to not work as well as one would hope
+ if type(self._values[param].value) in \
+ [str, unicode, int, long, float, bool, None]:
+ d[param] = self._values[param].value
+ else:
+ d[param] = str(self._values[param])
+
+ except AttributeError:
+ pass
+
+ for n in sorted(self._children.keys()):
+ child = self._children[n]
+ # Use the name of the attribute (and not get_name()) as
+ # the key in the JSON dictionary to capture the hierarchy
+ # in the Python code that assembled this system
+ d[n] = child.get_config_as_dict()
+
+ for port_name in sorted(self._ports.keys()):
+ port = self._port_refs.get(port_name, None)
+ if port != None:
+ # Represent each port with a dictionary containing the
+ # prominent attributes
+ d[port_name] = port.get_config_as_dict()
+
+ return d
+
def getCCParams(self):
if self._ccParams:
return self._ccParams
for port_name in port_names:
port = self._port_refs.get(port_name, None)
if port != None:
- setattr(cc_params, port_name, port)
+ port_count = len(port)
+ else:
+ port_count = 0
+ setattr(cc_params, 'port_' + port_name + '_connection_count',
+ port_count)
self._ccParams = cc_params
return self._ccParams
for portRef in self._port_refs.itervalues():
portRef.ccConnect()
- def getMemoryMode(self):
- if not isinstance(self, m5.objects.System):
- return None
-
- return self._ccObject.getMemoryMode()
-
- def changeTiming(self, mode):
- if isinstance(self, m5.objects.System):
- # i don't know if there's a better way to do this - calling
- # setMemoryMode directly from self._ccObject results in calling
- # SimObject::setMemoryMode, not the System::setMemoryMode
- self._ccObject.setMemoryMode(mode)
-
- def takeOverFrom(self, old_cpu):
- self._ccObject.takeOverFrom(old_cpu._ccObject)
-
- # generate output file for 'dot' to display as a pretty graph.
- # this code is currently broken.
- def outputDot(self, dot):
- label = "{%s|" % self.path
- if isSimObject(self.realtype):
- label += '%s|' % self.type
-
- if self.children:
- # instantiate children in same order they were added for
- # backward compatibility (else we can end up with cpu1
- # before cpu0).
- for c in self.children:
- dot.add_edge(pydot.Edge(self.path,c.path, style="bold"))
-
- simobjs = []
- for param in self.params:
- try:
- if param.value is None:
- raise AttributeError, 'Parameter with no value'
-
- value = param.value
- string = param.string(value)
- except Exception, e:
- msg = 'exception in %s:%s\n%s' % (self.name, param.name, e)
- e.args = (msg, )
- raise
-
- if isSimObject(param.ptype) and string != "Null":
- simobjs.append(string)
- else:
- label += '%s = %s\\n' % (param.name, string)
-
- for so in simobjs:
- label += "|<%s> %s" % (so, so)
- dot.add_edge(pydot.Edge("%s:%s" % (self.path, so), so,
- tailport="w"))
- label += '}'
- dot.add_node(pydot.Node(self.path,shape="Mrecord",label=label))
-
- # recursively dump out children
- for c in self.children:
- c.outputDot(dot)
-
# Function to provide to C++ so it can look up instances based on paths
def resolveSimObject(name):
obj = instanceDict[name]
baseInstances = instanceDict.copy()
def clear():
- global allClasses, instanceDict
+ global allClasses, instanceDict, noCxxHeader
allClasses = baseClasses.copy()
instanceDict = baseInstances.copy()
+ noCxxHeader = False
# __all__ defines the list of symbols that get exported when
# 'from config import *' is invoked. Try to keep this reasonably
projects / gem5.git / blobdiff