sim, arch, base: Refactor the base remote GDB class.

[gem5.git] / src / sim / clock_domain.hh

diff --git a/src/sim/clock_domain.hh b/src/sim/clock_domain.hh
index e0dce973b6aa2c4be032a76dfed6f5f28147cd5e..6ba8b63961907b099aacf8112d7e8cb776611229 100644 (file)
--- a/src/sim/clock_domain.hh
+++ b/src/sim/clock_domain.hh
@@ -237,12 +237,17 @@ class SrcClockDomain : public ClockDomain
         return freqOpPoints[perf_level];
     }
 
-    void startup();
+    void startup() override;
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
   private:
+    /**
+     * Inform other components about the changed performance level
+     */
+    void signalPerfLevelUpdate();
+
     /**
       * List of possible frequency operational points, should be in
       * descending order