arch-arm: Do not check MustBeOne flag for TLB requests from the prefetcher

[gem5.git] / src / sim / eventq.hh

diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index 781bcdbf98e9170700357b7c34d61937c1228383..895f69424af2c31c0178799a05d10daf645fee93 100644 (file)
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -161,6 +161,9 @@ class EventBase
     /// (such as writebacks).
     static const Priority CPU_Tick_Pri =                50;
 
+    /// If we want to exit a thread in a CPU, it comes after CPU_Tick_Pri
+    static const Priority CPU_Exit_Pri =                64;
+
     /// Statistics events (dump, reset, etc.) come after
     /// everything else, but before exit.
     static const Priority Stat_Event_Pri =              90;
@@ -711,7 +714,11 @@ class EventQueue
      */
     void checkpointReschedule(Event *event);
 
-    virtual ~EventQueue() { }
+    virtual ~EventQueue()
+    {
+        while (!empty())
+            deschedule(getHead());
+    }
 };
 
 void dumpMainQueue();