pseudoinst: get rid of mainEventQueue references.

[gem5.git] / src / sim / insttracer.hh

diff --git a/src/sim/insttracer.hh b/src/sim/insttracer.hh
index bcab455192129889abdb593657a849d8eef33106..2afea07ea685b127c070a48b41c4100e425b4dc1 100644 (file)
--- a/src/sim/insttracer.hh
+++ b/src/sim/insttracer.hh
@@ -54,10 +54,10 @@ class InstRecord
     // need to make this ref-counted so it doesn't go away before we
     // dump the record
     StaticInstPtr staticInst;
-    Addr PC;
+    TheISA::PCState pc;
     StaticInstPtr macroStaticInst;
-    MicroPC upc;
     bool misspeculating;
+    bool predicate;
 
     // The remaining fields are only valid for particular instruction
     // types (e.g, addresses for memory ops) or when particular
@@ -89,13 +89,12 @@ class InstRecord
   public:
     InstRecord(Tick _when, ThreadContext *_thread,
                const StaticInstPtr _staticInst,
-               Addr _pc, bool spec,
-               const StaticInstPtr _macroStaticInst = NULL,
-               MicroPC _upc = 0)
+               TheISA::PCState _pc, bool spec,
+               const StaticInstPtr _macroStaticInst = NULL)
         : when(_when), thread(_thread),
-          staticInst(_staticInst), PC(_pc),
-          macroStaticInst(_macroStaticInst), upc(_upc),
-          misspeculating(spec)
+          staticInst(_staticInst), pc(_pc),
+          macroStaticInst(_macroStaticInst),
+          misspeculating(spec), predicate(true)
     {
         data_status = DataInvalid;
         addr_valid = false;
@@ -128,7 +127,30 @@ class InstRecord
     void setCPSeq(InstSeqNum seq)
     { cp_seq = seq; cp_seq_valid = true; }
 
+    void setPredicate(bool val) { predicate = val; }
+
     virtual void dump() = 0;
+    
+  public:
+    Tick getWhen() { return when; }
+    ThreadContext *getThread() { return thread; }
+    StaticInstPtr getStaticInst() { return staticInst; }
+    TheISA::PCState getPCState() { return pc; }
+    StaticInstPtr getMacroStaticInst() { return macroStaticInst; }
+    bool getMisspeculating() { return misspeculating; }
+
+    Addr getAddr() { return addr; }
+    bool getAddrValid() { return addr_valid; }
+
+    uint64_t getIntData() { return data.as_int; }
+    double getFloatData() { return data.as_double; }
+    int getDataStatus() { return data_status; }
+
+    InstSeqNum getFetchSeq() { return fetch_seq; }
+    bool getFetchSeqValid() { return fetch_seq_valid; }
+
+    InstSeqNum getCpSeq() { return cp_seq; }
+    bool getCpSeqValid() { return cp_seq_valid; }
 };
 
 class InstTracer : public SimObject
@@ -142,13 +164,12 @@ class InstTracer : public SimObject
 
     virtual InstRecord *
         getInstRecord(Tick when, ThreadContext *tc,
-                const StaticInstPtr staticInst, Addr pc,
-                const StaticInstPtr macroStaticInst = NULL,
-                MicroPC _upc = 0) = 0;
+                const StaticInstPtr staticInst, TheISA::PCState pc,
+                const StaticInstPtr macroStaticInst = NULL) = 0;
 };
 
 
 
-}; // namespace Trace
+} // namespace Trace
 
 #endif // __INSTRECORD_HH__