/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2001-2005 The Regents of The University of Michigan
* All rights reserved.
*
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
-#include "mem/physical.hh"
-#include "mem/translating_port.hh"
+#include "mem/se_translating_port_proxy.hh"
#include "params/LiveProcess.hh"
#include "params/Process.hh"
#include "sim/debug.hh"
a_val = TheISA::htog(val);
}
-template class AuxVector<uint32_t>;
-template class AuxVector<uint64_t>;
+template struct AuxVector<uint32_t>;
+template struct AuxVector<uint64_t>;
Process::Process(ProcessParams * params)
: SimObject(params), system(params->system),
- max_stack_size(params->max_stack_size)
+ max_stack_size(params->max_stack_size),
+ M5_pid(system->allocatePID()),
+ pTable(new PageTable(name(), M5_pid)),
+ initVirtMem(system->getSystemPort(), this,
+ SETranslatingPortProxy::Always)
{
string in = params->input;
string out = params->output;
else
stderr_fd = Process::openOutputFile(err);
- M5_pid = system->allocatePID();
// initialize first 3 fds (stdin, stdout, stderr)
Process::FdMap *fdo = &fd_map[STDIN_FILENO];
fdo->fd = stdin_fd;
mmap_start = mmap_end = 0;
nxm_start = nxm_end = 0;
- pTable = new PageTable(name(), M5_pid);
// other parameters will be initialized when the program is loaded
}
ThreadContext *tc = system->getThreadContext(contextIds[0]);
// mark this context as active so it will start ticking.
- tc->activate(0);
-
- Port *mem_port;
- mem_port = system->physmem->getPort("functional");
- initVirtMem = new TranslatingPort("process init port", this,
- TranslatingPort::Always);
- mem_port->setPeer(initVirtMem);
- initVirtMem->setPeer(mem_port);
+ tc->activate(Cycles(0));
}
// map simulator fd sim_fd to target fd tgt_fd
}
+bool
+Process::map(Addr vaddr, Addr paddr, int size)
+{
+ pTable->map(vaddr, paddr, size);
+ return true;
+}
+
+
////////////////////////////////////////////////////////////////////////
//
// LiveProcess member definitions
__pid = params->pid;
__ppid = params->ppid;
- prog_fname = params->cmd[0];
-
// load up symbols, if any... these may be used for debugging or
// profiling.
if (!debugSymbolTable) {