ARM: Implement WFE/WFI/SEV semantics.

[gem5.git] / src / sim / pseudo_inst.hh

diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index 4dd427c99a054458c2fdecda9255e1b768aed677..aec3b5d8ad2d378260f014662f5895d36f14502e 100644 (file)
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -24,39 +24,47 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
  */
 
-class ExecContext;
+class ThreadContext;
+
+//We need the "Tick" and "Addr" data types from here
+#include "base/types.hh"
+
+namespace PseudoInst {
+
+/**
+ * @todo these externs are only here for a hack in fullCPU::takeOver...
+ */
+extern bool doStatisticsInsts;
+extern bool doCheckpointInsts;
+extern bool doQuiesce;
 
-//We need the "Tick" data type from here
-#include "sim/host.hh"
-//We need the "Addr" data type from here
-#include "arch/isa_traits.hh"
+#if FULL_SYSTEM
+void arm(ThreadContext *tc);
+void quiesce(ThreadContext *tc);
+void quiesceSkip(ThreadContext *tc);
+void quiesceNs(ThreadContext *tc, uint64_t ns);
+void quiesceCycles(ThreadContext *tc, uint64_t cycles);
+uint64_t quiesceTime(ThreadContext *tc);
+uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
+    uint64_t offset);
+void loadsymbol(ThreadContext *xc);
+void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
+#endif
 
-namespace AlphaPseudo
-{
-    /**
-     * @todo these externs are only here for a hack in fullCPU::takeOver...
-     */
-    extern bool doStatisticsInsts;
-    extern bool doCheckpointInsts;
-    extern bool doQuiesce;
+uint64_t rpns(ThreadContext *tc);
+void wakeCPU(ThreadContext *tc, uint64_t cpuid);
+void m5exit(ThreadContext *tc, Tick delay);
+void resetstats(ThreadContext *tc, Tick delay, Tick period);
+void dumpstats(ThreadContext *tc, Tick delay, Tick period);
+void dumpresetstats(ThreadContext *tc, Tick delay, Tick period);
+void m5checkpoint(ThreadContext *tc, Tick delay, Tick period);
+void debugbreak(ThreadContext *tc);
+void switchcpu(ThreadContext *tc);
+void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid);
+void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid);
 
-    void arm(ExecContext *xc);
-    void quiesce(ExecContext *xc);
-    void quiesceNs(ExecContext *xc, uint64_t ns);
-    void quiesceCycles(ExecContext *xc, uint64_t cycles);
-    uint64_t quiesceTime(ExecContext *xc);
-    void ivlb(ExecContext *xc);
-    void ivle(ExecContext *xc);
-    void m5exit(ExecContext *xc, Tick delay);
-    void m5exit_old(ExecContext *xc);
-    void resetstats(ExecContext *xc, Tick delay, Tick period);
-    void dumpstats(ExecContext *xc, Tick delay, Tick period);
-    void dumpresetstats(ExecContext *xc, Tick delay, Tick period);
-    void m5checkpoint(ExecContext *xc, Tick delay, Tick period);
-    uint64_t readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset);
-    void debugbreak(ExecContext *xc);
-    void switchcpu(ExecContext *xc);
-    void addsymbol(ExecContext *xc, Addr addr, Addr symbolAddr);
-}
+} // namespace PseudoInst