cpu: implements vector registers

[gem5.git] / src / sim / sim_object.cc

diff --git a/src/sim/sim_object.cc b/src/sim/sim_object.cc
index 422f5095aa15bc63f2f0bb6775747941e56f0d1a..e87b7240fd7d1c2cfddaa95767183bd817c11a6c 100644 (file)
--- a/src/sim/sim_object.cc
+++ b/src/sim/sim_object.cc
@@ -39,6 +39,7 @@
 #include "base/trace.hh"
 #include "base/types.hh"
 #include "debug/Checkpoint.hh"
+#include "sim/probe/probe.hh"
 #include "sim/sim_object.hh"
 #include "sim/stats.hh"
 
@@ -60,14 +61,18 @@ SimObject::SimObjectList SimObject::simObjectList;
 // SimObject constructor: used to maintain static simObjectList
 //
 SimObject::SimObject(const Params *p)
-    : EventManager(p->eventq), _params(p)
+    : EventManager(getEventQueue(p->eventq_index)), _params(p)
 {
 #ifdef DEBUG
     doDebugBreak = false;
 #endif
-
     simObjectList.push_back(this);
-    state = Running;
+    probeManager = new ProbeManager(this);
+}
+
+SimObject::~SimObject()
+{
+    delete probeManager;
 }
 
 void
@@ -76,11 +81,13 @@ SimObject::init()
 }
 
 void
-SimObject::loadState(Checkpoint *cp)
+SimObject::loadState(CheckpointIn &cp)
 {
-    if (cp->sectionExists(name())) {
+    if (cp.sectionExists(name())) {
         DPRINTF(Checkpoint, "unserializing\n");
-        unserialize(cp, name());
+        // This works despite name() returning a fully qualified name
+        // since we are at the top level.
+        unserializeSection(cp, name());
     } else {
         DPRINTF(Checkpoint, "no checkpoint section found\n");
     }
@@ -109,19 +116,42 @@ SimObject::resetStats()
 {
 }
 
+/**
+ * No probe points by default, so do nothing in base.
+ */
+void
+SimObject::regProbePoints()
+{
+}
+
+/**
+ * No probe listeners by default, so do nothing in base.
+ */
+void
+SimObject::regProbeListeners()
+{
+}
+
+ProbeManager *
+SimObject::getProbeManager()
+{
+    return probeManager;
+}
+
 //
 // static function: serialize all SimObjects.
 //
 void
-SimObject::serializeAll(ostream &os)
+SimObject::serializeAll(CheckpointOut &cp)
 {
     SimObjectList::reverse_iterator ri = simObjectList.rbegin();
     SimObjectList::reverse_iterator rend = simObjectList.rend();
 
     for (; ri != rend; ++ri) {
         SimObject *obj = *ri;
-        obj->nameOut(os);
-        obj->serialize(os);
+        // This works despite name() returning a fully qualified name
+        // since we are at the top level.
+        obj->serializeSectionOld(cp, obj->name());
    }
 }
 
@@ -150,38 +180,6 @@ debugObjectBreak(const char *objs)
 }
 #endif
 
-unsigned int
-SimObject::drain(Event *drain_event)
-{
-    state = Drained;
-    return 0;
-}
-
-void
-SimObject::resume()
-{
-    state = Running;
-}
-
-void
-SimObject::setMemoryMode(Enums::MemoryMode new_mode)
-{
-    panic("setMemoryMode() should only be called on systems");
-}
-
-void
-SimObject::switchOut()
-{
-    panic("Unimplemented!");
-}
-
-void
-SimObject::takeOverFrom(BaseCPU *cpu)
-{
-    panic("Unimplemented!");
-}
-
-
 SimObject *
 SimObject::find(const char *name)
 {