arch-arm: Do not check MustBeOne flag for TLB requests from the prefetcher

[gem5.git] / src / sim / syscall_emul_buf.hh

diff --git a/src/sim/syscall_emul_buf.hh b/src/sim/syscall_emul_buf.hh
index cbd10f2f67790d878886f4a15ed2673a59d6814c..e930846be3f1fb00d8d9a3c4861aaa7f148db521 100644 (file)
--- a/src/sim/syscall_emul_buf.hh
+++ b/src/sim/syscall_emul_buf.hh
@@ -70,12 +70,12 @@ class BaseBufferArg {
         memset(bufPtr, 0, size);
     }
 
-    virtual ~BaseBufferArg() { delete [] bufPtr; }
+    ~BaseBufferArg() { delete [] bufPtr; }
 
     /**
      * copy data into simulator space (read from target memory)
      */
-    virtual bool copyIn(SETranslatingPortProxy &memproxy)
+    bool copyIn(SETranslatingPortProxy &memproxy)
     {
         memproxy.readBlob(addr, bufPtr, size);
         return true;    // no EFAULT detection for now
@@ -84,7 +84,7 @@ class BaseBufferArg {
     /**
      * copy data out of simulator space (write to target memory)
      */
-    virtual bool copyOut(SETranslatingPortProxy &memproxy)
+    bool copyOut(SETranslatingPortProxy &memproxy)
     {
         memproxy.writeBlob(addr, bufPtr, size);
         return true;    // no EFAULT detection for now