cpu: implements vector registers

[gem5.git] / src / sim / system.hh

diff --git a/src/sim/system.hh b/src/sim/system.hh
index b8114d0ca36b336fe25ecce6d6980f455e756627..97d271d3aa1aa1269317f96071c3c203f7ad4f47 100644 (file)
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -520,8 +520,7 @@ class System : public MemObject
     void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
     void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
-    unsigned int drain(DrainManager *dm);
-    void drainResume();
+    void drainResume() M5_ATTR_OVERRIDE;
 
   public:
     Counter totalNumInsts;