SystemPort(const std::string &_name, MemObject *_owner)
: MasterPort(_name, _owner)
{ }
- bool recvTimingResp(PacketPtr pkt)
+ bool recvTimingResp(PacketPtr pkt) override
{ panic("SystemPort does not receive timing!\n"); return false; }
- void recvReqRetry()
+ void recvReqRetry() override
{ panic("SystemPort does not expect retry!\n"); }
};
* After all objects have been created and all ports are
* connected, check that the system port is connected.
*/
- virtual void init();
+ void init() override;
/**
* Get a reference to the system port that can be used by
* Additional function to return the Port of a memory object.
*/
BaseMasterPort& getMasterPort(const std::string &if_name,
- PortID idx = InvalidPortID);
+ PortID idx = InvalidPortID) override;
/** @{ */
/**
std::vector<ThreadContext *> threadContexts;
int _numContexts;
+ const bool multiThread;
- ThreadContext *getThreadContext(ThreadID tid)
+ ThreadContext *getThreadContext(ContextID tid)
{
return threadContexts[tid];
}
return masterIds.size();
}
- virtual void regStats();
+ void regStats() override;
/**
* Called by pseudo_inst to track the number of work items started by this
* system.
System(Params *p);
~System();
- void initState();
+ void initState() override;
const Params *params() const { return (const Params *)_params; }
/// @return Starting address of first page
Addr allocPhysPages(int npages);
- int registerThreadContext(ThreadContext *tc, int assigned=-1);
- void replaceThreadContext(ThreadContext *tc, int context_id);
+ ContextID registerThreadContext(ThreadContext *tc,
+ ContextID assigned = InvalidContextID);
+ void replaceThreadContext(ThreadContext *tc, ContextID context_id);
- void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
- void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+ void serialize(CheckpointOut &cp) const override;
+ void unserialize(CheckpointIn &cp) override;
- unsigned int drain(DrainManager *dm);
- void drainResume();
+ void drainResume() override;
public:
Counter totalNumInsts;