ARM: Implement WFE/WFI/SEV semantics.

[gem5.git] / src / sim / tlb.cc

diff --git a/src/sim/tlb.cc b/src/sim/tlb.cc
index 60ad8c1559cf5cf016a902a14d8bbff5464a56ce..8cde0db2e7b540b748d11c010b2c128c97f142e0 100644 (file)
--- a/src/sim/tlb.cc
+++ b/src/sim/tlb.cc
@@ -30,11 +30,12 @@
 
 #include "cpu/thread_context.hh"
 #include "mem/page_table.hh"
+#include "sim/faults.hh"
 #include "sim/process.hh"
 #include "sim/tlb.hh"
 
 Fault
-GenericTLB::translateAtomic(RequestPtr req, ThreadContext * tc, bool, bool)
+GenericTLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode)
 {
 #if FULL_SYSTEM
         panic("Generic translation shouldn't be used in full system mode.\n");
@@ -51,11 +52,10 @@ GenericTLB::translateAtomic(RequestPtr req, ThreadContext * tc, bool, bool)
 
 void
 GenericTLB::translateTiming(RequestPtr req, ThreadContext *tc,
-        Translation *translation, bool write, bool execute)
+        Translation *translation, Mode mode)
 {
     assert(translation);
-    translation->finish(translateAtomic(req, tc, write, execute),
-            req, tc, write, execute);
+    translation->finish(translateAtomic(req, tc, mode), req, tc, mode);
 }
 
 void