pseudoinst: get rid of mainEventQueue references.

[gem5.git] / src / sim / tlb.hh

diff --git a/src/sim/tlb.hh b/src/sim/tlb.hh
index 8893f8c97c746af4913c00b429d74ae66f0a4d9f..a3e5c22c7b5202859a0a75fb16491f22c0f067d2 100644 (file)
--- a/src/sim/tlb.hh
+++ b/src/sim/tlb.hh
@@ -33,21 +33,31 @@
 
 #include "base/misc.hh"
 #include "mem/request.hh"
-#include "sim/faults.hh"
+#include "sim/fault.hh"
 #include "sim/sim_object.hh"
 
 class ThreadContext;
 class Packet;
+class Port;
 
 class BaseTLB : public SimObject
 {
   protected:
-    BaseTLB(const Params *p) : SimObject(p)
+    BaseTLB(const Params *p)
+        : SimObject(p)
     {}
 
+  public:
+    enum Mode { Read, Write, Execute };
+
   public:
     virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
 
+    /** Get any port that the TLB or hardware table walker needs.
+     * This is used for migrating port connections during a takeOverFrom()
+     * call. */
+    virtual Port*  getPort() { return NULL; }
+
     class Translation
     {
       public:
@@ -59,23 +69,24 @@ class BaseTLB : public SimObject
          * be responsible for cleaning itself up which will happen in this
          * function. Once it's called, the object is no longer valid.
          */
-        virtual void finish(Fault fault, RequestPtr req,
-                ThreadContext *tc, bool write=false) = 0;
+        virtual void finish(Fault fault, RequestPtr req, ThreadContext *tc,
+                            Mode mode) = 0;
     };
 };
 
 class GenericTLB : public BaseTLB
 {
   protected:
-    GenericTLB(const Params *p) : BaseTLB(p)
+    GenericTLB(const Params *p)
+        : BaseTLB(p)
     {}
 
   public:
     void demapPage(Addr vaddr, uint64_t asn);
 
-    Fault translateAtomic(RequestPtr req, ThreadContext *tc, bool=false);
+    Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
     void translateTiming(RequestPtr req, ThreadContext *tc,
-            Translation *translation, bool=false);
+                         Translation *translation, Mode mode);
 };
 
 #endif // __ARCH_SPARC_TLB_HH__