cpu: Added interface for vector reg file

[gem5.git] / src / sim / vptr.hh

diff --git a/src/sim/vptr.hh b/src/sim/vptr.hh
index 383f653519ff77aad1628a3b34743110ea5141f0..6eefd59373c1f04ba5de87d53e8f354e08a440e4 100644 (file)
--- a/src/sim/vptr.hh
+++ b/src/sim/vptr.hh
@@ -31,9 +31,7 @@
 #ifndef __ARCH_ALPHA_VPTR_HH__
 #define __ARCH_ALPHA_VPTR_HH__
 
-#include "arch/vtophys.hh"
-#include "arch/isa_traits.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
 
 class ThreadContext;
 
@@ -71,9 +69,8 @@ class VPtr
         if (!ptr)
             return;
 
-        VirtualPort *port = tc->getVirtPort(tc);
-        port->readBlob(ptr, buffer, sizeof(T));
-        tc->delVirtPort(port);
+        FSTranslatingPortProxy &proxy = tc->getVirtProxy();
+        proxy.readBlob(ptr, buffer, sizeof(T));
     }
 
     bool