mass-rename of modules to soc.fu.*

[soc.git] / src / soc / fu / shift_rot / test / test_maskgen.py

diff --git a/src/soc/fu/shift_rot/test/test_maskgen.py b/src/soc/fu/shift_rot/test/test_maskgen.py
index 1a4d34e676154b250f95ef120932a9b88fcaf937..93f38f2471a0f8098c4e39a6a682285b393e389e 100644 (file)
--- a/src/soc/fu/shift_rot/test/test_maskgen.py
+++ b/src/soc/fu/shift_rot/test/test_maskgen.py
@@ -2,7 +2,7 @@ from nmigen import Signal, Module
 from nmigen.back.pysim import Simulator, Delay, Settle
 from nmigen.test.utils import FHDLTestCase
 from nmigen.cli import rtlil
-from soc.alu.maskgen import MaskGen
+from soc.fu.alu.maskgen import MaskGen
 from soc.decoder.helpers import MASK
 import random
 import unittest