def specgen(of, pth, pinouts, bankspec, muxwidths, pinbanks, fixedpins,
- fastbus):
+ configs):
""" generates a specification of pinouts (tsv files)
for reading in by pinmux.
#print pinouts.ganged.items()
if not os.path.exists(pth):
os.makedirs(pth)
+ with open(os.path.join(pth, 'configs.txt'), 'w') as f:
+ for (name, d) in configs.items():
+ d = d.items()
+ d.sort()
+ vals = []
+ for (k, v) in d:
+ vals.append("%s=%s" % (k, repr(v)))
+ line = [name.lower(), '\t'.join(vals)]
+ line = '\t'.join(line)
+ f.write("%s\n" % line)
+
with open(os.path.join(pth, 'interfaces.txt'), 'w') as f:
for k in pinouts.fnspec.keys():
s = pinouts.fnspec[k]
line = [k.lower(), str(len(s))]
- for b in fastbus:
- if b.startswith(k.lower()):
- line.append(b)
line = '\t'.join(line)
f.write("%s\n" % line)
s0 = s[list(s.keys())[0]] # hack, take first
g.write("\tbus")
g.write("\n")
+ # work out range of bankspecs
+ bankpins = []
+ for k, v in bankspec.items():
+ bankpins.append((v, k))
+ bankpins.sort()
+ bankpins.reverse()
+ muxentries = {}
+ cellbank = {}
+
pks = sorted(pinouts.keys())
# truly dreadful way to work out the max mux size...
- muxsz = 0
for k in pks:
- for m in pinouts[k].keys():
- muxsz = max(muxsz, m + 1)
+ for (sz, bname) in bankpins:
+ print "keys", k, sz, bname
+ if k >= sz:
+ print "found", bname
+ muxentries[k] = muxwidths[bname]
+ cellbank[k] = bname
+ break
+ print muxentries
# write out the mux...
with open(os.path.join(pth, 'pinmap.txt'), 'w') as g:
for k in pks:
- res = [str(k)]
+ muxsz = muxentries[k]
+ bank = cellbank[k]
+ res = [str(k), bank, str(muxsz)]
# append pin mux
for midx in range(muxsz):
if midx in pinouts[k]: