/* formats known by the HW device - based on gallium subset */
enum virgl_formats {
+ VIRGL_FORMAT_NONE = 0,
VIRGL_FORMAT_B8G8R8A8_UNORM = 1,
VIRGL_FORMAT_B8G8R8X8_UNORM = 2,
VIRGL_FORMAT_A8R8G8B8_UNORM = 3,
VIRGL_FORMAT_R10G10B10A2_UNORM = 8,
VIRGL_FORMAT_L8_UNORM = 9, /**< ubyte luminance */
VIRGL_FORMAT_A8_UNORM = 10, /**< ubyte alpha */
+ VIRGL_FORMAT_I8_UNORM = 11,
VIRGL_FORMAT_L8A8_UNORM = 12, /**< ubyte alpha, luminance */
VIRGL_FORMAT_L16_UNORM = 13, /**< ushort luminance */
-
+ VIRGL_FORMAT_UYVY = 14,
+ VIRGL_FORMAT_YUYV = 15,
VIRGL_FORMAT_Z16_UNORM = 16,
VIRGL_FORMAT_Z32_UNORM = 17,
VIRGL_FORMAT_Z32_FLOAT = 18,
VIRGL_FORMAT_R8G8_UNORM = 65,
VIRGL_FORMAT_R8G8B8_UNORM = 66,
VIRGL_FORMAT_R8G8B8A8_UNORM = 67,
+ VIRGL_FORMAT_X8B8G8R8_UNORM = 68,
VIRGL_FORMAT_R8_USCALED = 69,
VIRGL_FORMAT_R8G8_USCALED = 70,
VIRGL_FORMAT_R8G8B8_SSCALED = 84,
VIRGL_FORMAT_R8G8B8A8_SSCALED = 85,
+ VIRGL_FORMAT_R32_FIXED = 87,
+ VIRGL_FORMAT_R32G32_FIXED = 88,
+ VIRGL_FORMAT_R32G32B32_FIXED = 89,
+ VIRGL_FORMAT_R32G32B32A32_FIXED = 90,
+
VIRGL_FORMAT_R16_FLOAT = 91,
VIRGL_FORMAT_R16G16_FLOAT = 92,
VIRGL_FORMAT_R16G16B16_FLOAT = 93,
VIRGL_FORMAT_RGTC2_UNORM = 115,
VIRGL_FORMAT_RGTC2_SNORM = 116,
+ VIRGL_FORMAT_R8G8_B8G8_UNORM = 117,
+ VIRGL_FORMAT_G8R8_G8B8_UNORM = 118,
+
+ VIRGL_FORMAT_R8SG8SB8UX8U_NORM = 119,
+ VIRGL_FORMAT_R5SG5SB6U_NORM = 120,
+
VIRGL_FORMAT_A8B8G8R8_UNORM = 121,
VIRGL_FORMAT_B5G5R5X1_UNORM = 122,
VIRGL_FORMAT_R10G10B10A2_USCALED = 123,
VIRGL_FORMAT_R11G11B10_FLOAT = 124,
VIRGL_FORMAT_R9G9B9E5_FLOAT = 125,
VIRGL_FORMAT_Z32_FLOAT_S8X24_UINT = 126,
+ VIRGL_FORMAT_R1_UNORM = 127,
+ VIRGL_FORMAT_R10G10B10X2_USCALED = 128,
+ VIRGL_FORMAT_R10G10B10X2_SNORM = 129,
+ VIRGL_FORMAT_L4A4_UNORM = 130,
VIRGL_FORMAT_B10G10R10A2_UNORM = 131,
+ VIRGL_FORMAT_R10SG10SB10SA2U_NORM = 132,
+ VIRGL_FORMAT_R8G8Bx_SNORM = 133,
VIRGL_FORMAT_R8G8B8X8_UNORM = 134,
VIRGL_FORMAT_B4G4R4X4_UNORM = 135,
VIRGL_FORMAT_X24S8_UINT = 136,
VIRGL_FORMAT_A8_SNORM = 147,
VIRGL_FORMAT_L8_SNORM = 148,
VIRGL_FORMAT_L8A8_SNORM = 149,
-
+ VIRGL_FORMAT_I8_SNORM = 150,
VIRGL_FORMAT_A16_SNORM = 151,
VIRGL_FORMAT_L16_SNORM = 152,
VIRGL_FORMAT_L16A16_SNORM = 153,
+ VIRGL_FORMAT_I16_SNORM = 154,
VIRGL_FORMAT_A16_FLOAT = 155,
VIRGL_FORMAT_L16_FLOAT = 156,
VIRGL_FORMAT_L16A16_FLOAT = 157,
-
+ VIRGL_FORMAT_I16_FLOAT = 158,
VIRGL_FORMAT_A32_FLOAT = 159,
VIRGL_FORMAT_L32_FLOAT = 160,
VIRGL_FORMAT_L32A32_FLOAT = 161,
+ VIRGL_FORMAT_I32_FLOAT = 162,
VIRGL_FORMAT_YV12 = 163,
VIRGL_FORMAT_YV16 = 164,
VIRGL_FORMAT_NV12 = 166,
VIRGL_FORMAT_NV21 = 167,
+ VIRGL_FORMAT_A4R4_UNORM = 168,
+ VIRGL_FORMAT_R4A4_UNORM = 169,
+ VIRGL_FORMAT_R8A8_UNORM = 170,
+ VIRGL_FORMAT_A8R8_UNORM = 171,
+
VIRGL_FORMAT_R10G10B10A2_SSCALED = 172,
VIRGL_FORMAT_R10G10B10A2_SNORM = 173,
+ VIRGL_FORMAT_B10G10R10A2_USCALED = 174,
+ VIRGL_FORMAT_B10G10R10A2_SSCALED = 175,
VIRGL_FORMAT_B10G10R10A2_SNORM = 176,
VIRGL_FORMAT_R8_UINT = 177,
VIRGL_FORMAT_R32G32B32A32_SINT = 200,
VIRGL_FORMAT_A8_UINT = 201,
+ VIRGL_FORMAT_I8_UINT = 202,
VIRGL_FORMAT_L8_UINT = 203,
VIRGL_FORMAT_L8A8_UINT = 204,
VIRGL_FORMAT_A8_SINT = 205,
+ VIRGL_FORMAT_I8_SINT = 206,
VIRGL_FORMAT_L8_SINT = 207,
VIRGL_FORMAT_L8A8_SINT = 208,
VIRGL_FORMAT_A16_UINT = 209,
+ VIRGL_FORMAT_I16_UINT = 210,
VIRGL_FORMAT_L16_UINT = 211,
VIRGL_FORMAT_L16A16_UINT = 212,
VIRGL_FORMAT_A16_SINT = 213,
+ VIRGL_FORMAT_I16_SINT = 214,
VIRGL_FORMAT_L16_SINT = 215,
VIRGL_FORMAT_L16A16_SINT = 216,
VIRGL_FORMAT_A32_UINT = 217,
+ VIRGL_FORMAT_I32_UINT = 218,
VIRGL_FORMAT_L32_UINT = 219,
VIRGL_FORMAT_L32A32_UINT = 220,
VIRGL_FORMAT_A32_SINT = 221,
+ VIRGL_FORMAT_I32_SINT = 222,
VIRGL_FORMAT_L32_SINT = 223,
VIRGL_FORMAT_L32A32_SINT = 224,
VIRGL_FORMAT_B10G10R10A2_UINT = 225,
+ VIRGL_FORMAT_ETC1_RGB8 = 226,
+ VIRGL_FORMAT_R8G8_R8B8_UNORM = 227,
+ VIRGL_FORMAT_G8R8_B8R8_UNORM = 228,
VIRGL_FORMAT_R8G8B8X8_SNORM = 229,
VIRGL_FORMAT_R8G8B8X8_SRGB = 230,
VIRGL_FORMAT_R32G32B32X32_FLOAT = 239,
VIRGL_FORMAT_R32G32B32X32_UINT = 240,
VIRGL_FORMAT_R32G32B32X32_SINT = 241,
+ VIRGL_FORMAT_R8A8_SNORM = 242,
+ VIRGL_FORMAT_R16A16_UNORM = 243,
+ VIRGL_FORMAT_R16A16_SNORM = 244,
+ VIRGL_FORMAT_R16A16_FLOAT = 245,
+ VIRGL_FORMAT_R32A32_FLOAT = 246,
+ VIRGL_FORMAT_R8A8_UINT = 247,
+ VIRGL_FORMAT_R8A8_SINT = 248,
+ VIRGL_FORMAT_R16A16_UINT = 249,
+ VIRGL_FORMAT_R16A16_SINT = 250,
+ VIRGL_FORMAT_R32A32_UINT = 251,
+ VIRGL_FORMAT_R32A32_SINT = 252,
VIRGL_FORMAT_R10G10B10A2_UINT = 253,
+ VIRGL_FORMAT_B5G6R5_SRGB = 254,
VIRGL_FORMAT_BPTC_RGBA_UNORM = 255,
VIRGL_FORMAT_BPTC_SRGBA = 256,
VIRGL_FORMAT_BPTC_RGB_FLOAT = 257,
VIRGL_FORMAT_BPTC_RGB_UFLOAT = 258,
+ VIRGL_FORMAT_A16L16_UNORM = 262,
+
+ VIRGL_FORMAT_G8R8_UNORM = 263,
+ VIRGL_FORMAT_G8R8_SNORM = 264,
+ VIRGL_FORMAT_G16R16_UNORM = 265,
+ VIRGL_FORMAT_G16R16_SNORM = 266,
+ VIRGL_FORMAT_A8B8G8R8_SNORM = 267,
+
+ VIRGL_FORMAT_A8L8_UNORM = 259,
+ VIRGL_FORMAT_A8L8_SNORM = 260,
+ VIRGL_FORMAT_A8L8_SRGB = 261,
+
+ VIRGL_FORMAT_X8B8G8R8_SNORM = 268,
+
+
/* etc2 compressed */
VIRGL_FORMAT_ETC2_RGB8 = 269,
VIRGL_FORMAT_ETC2_SRGB8 = 270,
#define VIRGL_CAP_APP_TWEAK_SUPPORT (1 << 28)
#define VIRGL_CAP_BGRA_SRGB_IS_EMULATED (1 << 29)
#define VIRGL_CAP_CLEAR_TEXTURE (1 << 30)
-/* Reserved for VIRGL_CAP_ARB_BUFFER_STORAGE */
+#define VIRGL_CAP_ARB_BUFFER_STORAGE (1 << 31)
/* These are used by the capability_bits_v2 field in virgl_caps_v2. */
#define VIRGL_CAP_V2_BLEND_EQUATION (1 << 0)
#define VIRGL_BIND_STAGING (1 << 19)
#define VIRGL_BIND_SHARED (1 << 20)
-/* Extra flags that may be passed */
#define VIRGL_BIND_PREFER_EMULATED_BGRA (1 << 21)
+#define VIRGL_BIND_LINEAR (1 << 22)
+
+#define VIRGL_BIND_SHARED_SUBFLAGS (0xff << 24)
+
+#define VIRGL_BIND_MINIGBM_CAMERA_WRITE (1 << 24)
+#define VIRGL_BIND_MINIGBM_CAMERA_READ (1 << 25)
+#define VIRGL_BIND_MINIGBM_HW_VIDEO_DECODER (1 << 26)
+#define VIRGL_BIND_MINIGBM_HW_VIDEO_ENCODER (1 << 27)
+#define VIRGL_BIND_MINIGBM_SW_READ_OFTEN (1 << 28)
+#define VIRGL_BIND_MINIGBM_SW_READ_RARELY (1 << 29)
+#define VIRGL_BIND_MINIGBM_SW_WRITE_OFTEN (1 << 30)
+#define VIRGL_BIND_MINIGBM_SW_WRITE_RARELY (1 << 31)
+#define VIRGL_BIND_MINIGBM_PROTECTED (0xf << 28) // Mutually exclusive with SW_ flags
+
struct virgl_caps_bool_set1 {
unsigned indep_blend_enable:1;
unsigned indep_blend_func:1;
VIRGL_ERROR_CTX_ILLEGAL_VERTEX_FORMAT,
VIRGL_ERROR_CTX_ILLEGAL_CMD_BUFFER,
VIRGL_ERROR_CTX_GLES_HAVE_TES_BUT_MISS_TCS,
+ VIRGL_ERROR_GL_ANY_SAMPLES_PASSED,
+ VIRGL_ERROR_CTX_ILLEGAL_FORMAT,
+ VIRGL_ERROR_CTX_ILLEGAL_SAMPLER_VIEW_TARGET,
+ VIRGL_ERROR_CTX_TRANSFER_IOV_BOUNDS,
+ VIRGL_ERROR_CTX_ILLEGAL_DUAL_SRC_BLEND
};
+/**
+ * Flags for the driver about resource behaviour:
+ */
#define VIRGL_RESOURCE_Y_0_TOP (1 << 0)
+#define VIRGL_RESOURCE_FLAG_MAP_PERSISTENT (1 << 1)
+#define VIRGL_RESOURCE_FLAG_MAP_COHERENT (1 << 2)
+
#endif
projects / mesa.git / blobdiff