}
void
-anv_gem_close(struct anv_device *device, int gem_handle)
+anv_gem_close(struct anv_device *device, uint32_t gem_handle)
{
struct drm_gem_close close;
*/
void*
anv_gem_mmap(struct anv_device *device, uint32_t gem_handle,
- uint64_t offset, uint64_t size)
+ uint64_t offset, uint64_t size, uint32_t flags)
{
struct drm_i915_gem_mmap gem_mmap;
int ret;
gem_mmap.offset = offset;
gem_mmap.size = size;
VG_CLEAR(gem_mmap.addr_ptr);
-
-#ifdef I915_MMAP_WC
- gem_mmap.flags = 0;
-#endif
+ gem_mmap.flags = flags;
ret = anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_mmap);
if (ret != 0) {
munmap(p, size);
}
-int
+uint32_t
anv_gem_userptr(struct anv_device *device, void *mem, size_t size)
{
struct drm_i915_gem_userptr userptr;
return userptr.handle;
}
+int
+anv_gem_set_caching(struct anv_device *device,
+ uint32_t gem_handle, uint32_t caching)
+{
+ struct drm_i915_gem_caching gem_caching;
+
+ VG_CLEAR(gem_caching);
+ gem_caching.handle = gem_handle;
+ gem_caching.caching = caching;
+
+ return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_CACHING, &gem_caching);
+}
+
+int
+anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
+ uint32_t read_domains, uint32_t write_domain)
+{
+ struct drm_i915_gem_set_domain gem_set_domain;
+
+ VG_CLEAR(gem_set_domain);
+ gem_set_domain.handle = gem_handle;
+ gem_set_domain.read_domains = read_domains;
+ gem_set_domain.write_domain = write_domain;
+
+ return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &gem_set_domain);
+}
+
/**
* On error, \a timeout_ns holds the remaining time.
*/
int
-anv_gem_wait(struct anv_device *device, int gem_handle, int64_t *timeout_ns)
+anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns)
{
struct drm_i915_gem_wait wait;
int ret;
int
anv_gem_set_tiling(struct anv_device *device,
- int gem_handle, uint32_t stride, uint32_t tiling)
+ uint32_t gem_handle, uint32_t stride, uint32_t tiling)
{
struct drm_i915_gem_set_tiling set_tiling;
int ret;
do {
VG_CLEAR(set_tiling);
set_tiling.handle = gem_handle;
- set_tiling.tiling_mode = I915_TILING_X;
+ set_tiling.tiling_mode = tiling;
set_tiling.stride = stride;
ret = ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
return 0;
}
+bool
+anv_gem_get_bit6_swizzle(int fd, uint32_t tiling)
+{
+ struct drm_gem_close close;
+ int ret;
+
+ struct drm_i915_gem_create gem_create;
+ VG_CLEAR(gem_create);
+ gem_create.size = 4096;
+
+ if (anv_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create)) {
+ assert(!"Failed to create GEM BO");
+ return false;
+ }
+
+ bool swizzled = false;
+
+ /* set_tiling overwrites the input on the error path, so we have to open
+ * code anv_ioctl.
+ */
+ struct drm_i915_gem_set_tiling set_tiling;
+ do {
+ VG_CLEAR(set_tiling);
+ set_tiling.handle = gem_create.handle;
+ set_tiling.tiling_mode = tiling;
+ set_tiling.stride = tiling == I915_TILING_X ? 512 : 128;
+
+ ret = ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
+ } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
+
+ if (ret != 0) {
+ assert(!"Failed to set BO tiling");
+ goto close_and_return;
+ }
+
+ struct drm_i915_gem_get_tiling get_tiling;
+ VG_CLEAR(get_tiling);
+ get_tiling.handle = gem_create.handle;
+
+ if (anv_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling)) {
+ assert(!"Failed to get BO tiling");
+ goto close_and_return;
+ }
+
+ swizzled = get_tiling.swizzle_mode != I915_BIT_6_SWIZZLE_NONE;
+
+close_and_return:
+
+ VG_CLEAR(close);
+ close.handle = gem_create.handle;
+ anv_ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close);
+
+ return swizzled;
+}
+
int
anv_gem_create_context(struct anv_device *device)
{
}
int
-anv_gem_handle_to_fd(struct anv_device *device, int gem_handle)
+anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle)
{
struct drm_prime_handle args;
int ret;
return args.fd;
}
-int
+uint32_t
anv_gem_fd_to_handle(struct anv_device *device, int fd)
{
struct drm_prime_handle args;