}
void
-anv_gem_close(struct anv_device *device, int gem_handle)
+anv_gem_close(struct anv_device *device, uint32_t gem_handle)
{
struct drm_gem_close close;
munmap(p, size);
}
-int
+uint32_t
anv_gem_userptr(struct anv_device *device, void *mem, size_t size)
{
struct drm_i915_gem_userptr userptr;
}
int
-anv_gem_set_caching(struct anv_device *device, int gem_handle, uint32_t caching)
+anv_gem_set_caching(struct anv_device *device,
+ uint32_t gem_handle, uint32_t caching)
{
struct drm_i915_gem_caching gem_caching;
}
int
-anv_gem_set_domain(struct anv_device *device, int gem_handle,
+anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
uint32_t read_domains, uint32_t write_domain)
{
struct drm_i915_gem_set_domain gem_set_domain;
* On error, \a timeout_ns holds the remaining time.
*/
int
-anv_gem_wait(struct anv_device *device, int gem_handle, int64_t *timeout_ns)
+anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns)
{
struct drm_i915_gem_wait wait;
int ret;
int
anv_gem_set_tiling(struct anv_device *device,
- int gem_handle, uint32_t stride, uint32_t tiling)
+ uint32_t gem_handle, uint32_t stride, uint32_t tiling)
{
struct drm_i915_gem_set_tiling set_tiling;
int ret;
do {
VG_CLEAR(set_tiling);
set_tiling.handle = gem_handle;
- set_tiling.tiling_mode = I915_TILING_X;
+ set_tiling.tiling_mode = tiling;
set_tiling.stride = stride;
ret = ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
}
int
-anv_gem_handle_to_fd(struct anv_device *device, int gem_handle)
+anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle)
{
struct drm_prime_handle args;
int ret;
return args.fd;
}
-int
+uint32_t
anv_gem_fd_to_handle(struct anv_device *device, int fd)
{
struct drm_prime_handle args;