*/
#include "anv_nir.h"
+#include "program/prog_parameter.h"
#include "glsl/nir/nir_builder.h"
struct apply_pipeline_layout_state {
nir_shader *shader;
nir_builder builder;
- VkShaderStage stage;
const struct anv_pipeline_layout *layout;
bool progress;
};
-static nir_intrinsic_op
-lowered_op(nir_intrinsic_op op)
-{
- switch (op) {
- case nir_intrinsic_load_ubo_vk:
- return nir_intrinsic_load_ubo;
- case nir_intrinsic_load_ubo_vk_indirect:
- return nir_intrinsic_load_ubo_indirect;
- case nir_intrinsic_load_ssbo_vk:
- return nir_intrinsic_load_ssbo;
- case nir_intrinsic_load_ssbo_vk_indirect:
- return nir_intrinsic_load_ssbo_indirect;
- case nir_intrinsic_store_ssbo_vk:
- return nir_intrinsic_store_ssbo;
- case nir_intrinsic_store_ssbo_vk_indirect:
- return nir_intrinsic_store_ssbo_indirect;
- default:
- unreachable("Invalid intrinsic for lowering");
- }
-}
-
static uint32_t
get_surface_index(unsigned set, unsigned binding,
struct apply_pipeline_layout_state *state)
struct anv_descriptor_set_layout *set_layout =
state->layout->set[set].layout;
+ gl_shader_stage stage = state->shader->stage;
+
assert(binding < set_layout->binding_count);
- assert(set_layout->binding[binding].stage[state->stage].surface_index >= 0);
+ assert(set_layout->binding[binding].stage[stage].surface_index >= 0);
uint32_t surface_index =
- state->layout->set[set].stage[state->stage].surface_start +
- set_layout->binding[binding].stage[state->stage].surface_index;
+ state->layout->set[set].stage[stage].surface_start +
+ set_layout->binding[binding].stage[stage].surface_index;
- assert(surface_index < state->layout->stage[state->stage].surface_count);
+ assert(surface_index < state->layout->stage[stage].surface_count);
return surface_index;
}
-static bool
-try_lower_intrinsic(nir_intrinsic_instr *intrin,
- struct apply_pipeline_layout_state *state)
+static uint32_t
+get_sampler_index(unsigned set, unsigned binding, nir_texop tex_op,
+ struct apply_pipeline_layout_state *state)
{
- nir_builder *b = &state->builder;
+ assert(set < state->layout->num_sets);
+ struct anv_descriptor_set_layout *set_layout =
+ state->layout->set[set].layout;
+
+ assert(binding < set_layout->binding_count);
+
+ gl_shader_stage stage = state->shader->stage;
- int block_idx_src;
- switch (intrin->intrinsic) {
- case nir_intrinsic_load_ubo_vk:
- case nir_intrinsic_load_ubo_vk_indirect:
- case nir_intrinsic_load_ssbo_vk:
- case nir_intrinsic_load_ssbo_vk_indirect:
- block_idx_src = 0;
- break;
- case nir_intrinsic_store_ssbo_vk:
- case nir_intrinsic_store_ssbo_vk_indirect:
- block_idx_src = 1;
- break;
- default:
- return false;
+ if (set_layout->binding[binding].stage[stage].sampler_index < 0) {
+ assert(tex_op == nir_texop_txf);
+ return 0;
}
+ uint32_t sampler_index =
+ state->layout->set[set].stage[stage].sampler_start +
+ set_layout->binding[binding].stage[stage].sampler_index;
+
+ assert(sampler_index < state->layout->stage[stage].sampler_count);
+
+ return sampler_index;
+}
+
+static uint32_t
+get_image_index(unsigned set, unsigned binding,
+ struct apply_pipeline_layout_state *state)
+{
+ assert(set < state->layout->num_sets);
+ struct anv_descriptor_set_layout *set_layout =
+ state->layout->set[set].layout;
+
+ assert(binding < set_layout->binding_count);
+
+ gl_shader_stage stage = state->shader->stage;
+
+ assert(set_layout->binding[binding].stage[stage].image_index >= 0);
+
+ uint32_t image_index =
+ state->layout->set[set].stage[stage].image_start +
+ set_layout->binding[binding].stage[stage].image_index;
+
+ assert(image_index < state->layout->stage[stage].image_count);
+
+ return image_index;
+}
+
+static void
+lower_res_index_intrinsic(nir_intrinsic_instr *intrin,
+ struct apply_pipeline_layout_state *state)
+{
+ nir_builder *b = &state->builder;
+
b->cursor = nir_before_instr(&intrin->instr);
uint32_t set = intrin->const_index[0];
uint32_t surface_index = get_surface_index(set, binding, state);
nir_const_value *const_block_idx =
- nir_src_as_const_value(intrin->src[block_idx_src]);
+ nir_src_as_const_value(intrin->src[0]);
nir_ssa_def *block_index;
if (const_block_idx) {
block_index = nir_imm_int(b, surface_index + const_block_idx->u[0]);
} else {
block_index = nir_iadd(b, nir_imm_int(b, surface_index),
- nir_ssa_for_src(b, intrin->src[block_idx_src], 1));
+ nir_ssa_for_src(b, intrin->src[0], 1));
}
- nir_instr_rewrite_src(&intrin->instr, &intrin->src[block_idx_src],
- nir_src_for_ssa(block_index));
-
- intrin->intrinsic = lowered_op(intrin->intrinsic);
- /* Shift the offset indices down */
- intrin->const_index[0] = intrin->const_index[2];
- intrin->const_index[1] = intrin->const_index[3];
-
- return true;
+ assert(intrin->dest.is_ssa);
+ nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(block_index));
+ nir_instr_remove(&intrin->instr);
}
static void
-lower_tex(nir_tex_instr *tex, struct apply_pipeline_layout_state *state)
+lower_tex_deref(nir_tex_instr *tex, nir_deref_var *deref,
+ unsigned *const_index, nir_tex_src_type src_type,
+ struct apply_pipeline_layout_state *state)
{
- /* No one should have come by and lowered it already */
- assert(tex->sampler);
+ if (deref->deref.child) {
+ assert(deref->deref.child->deref_type == nir_deref_type_array);
+ nir_deref_array *deref_array = nir_deref_as_array(deref->deref.child);
- unsigned set = tex->sampler->var->data.descriptor_set;
- unsigned binding = tex->sampler->var->data.binding;
-
- tex->sampler_index = get_surface_index(set, binding, state);
-
- if (tex->sampler->deref.child) {
- assert(tex->sampler->deref.child->deref_type == nir_deref_type_array);
- nir_deref_array *deref_array =
- nir_deref_as_array(tex->sampler->deref.child);
-
- tex->sampler_index += deref_array->base_offset;
+ *const_index += deref_array->base_offset;
if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src,
/* Now we can go ahead and move the source over to being a
* first-class texture source.
*/
- tex->src[tex->num_srcs].src_type = nir_tex_src_sampler_offset;
+ tex->src[tex->num_srcs].src_type = src_type;
tex->num_srcs++;
- nir_instr_move_src(&tex->instr, &tex->src[tex->num_srcs - 1].src,
- &deref_array->indirect);
+ assert(deref_array->indirect.is_ssa);
+ nir_instr_rewrite_src(&tex->instr, &tex->src[tex->num_srcs - 1].src,
+ deref_array->indirect);
}
}
+}
+static void
+cleanup_tex_deref(nir_tex_instr *tex, nir_deref_var *deref)
+{
+ if (deref->deref.child == NULL)
+ return;
+
+ nir_deref_array *deref_array = nir_deref_as_array(deref->deref.child);
+
+ if (deref_array->deref_array_type != nir_deref_array_type_indirect)
+ return;
+
+ nir_instr_rewrite_src(&tex->instr, &deref_array->indirect, NIR_SRC_INIT);
+}
+
+static void
+lower_tex(nir_tex_instr *tex, struct apply_pipeline_layout_state *state)
+{
+ /* No one should have come by and lowered it already */
+ assert(tex->sampler);
+
+ nir_deref_var *tex_deref = tex->texture ? tex->texture : tex->sampler;
+ tex->texture_index =
+ get_surface_index(tex_deref->var->data.descriptor_set,
+ tex_deref->var->data.binding, state);
+ lower_tex_deref(tex, tex_deref, &tex->texture_index,
+ nir_tex_src_texture_offset, state);
+
+ tex->sampler_index =
+ get_sampler_index(tex->sampler->var->data.descriptor_set,
+ tex->sampler->var->data.binding, tex->op, state);
+ lower_tex_deref(tex, tex->sampler, &tex->sampler_index,
+ nir_tex_src_sampler_offset, state);
+
+ if (tex->texture)
+ cleanup_tex_deref(tex, tex->texture);
+ cleanup_tex_deref(tex, tex->sampler);
+ tex->texture = NULL;
tex->sampler = NULL;
}
nir_foreach_instr_safe(block, instr) {
switch (instr->type) {
- case nir_instr_type_intrinsic:
- if (try_lower_intrinsic(nir_instr_as_intrinsic(instr), state))
+ case nir_instr_type_intrinsic: {
+ nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
+ if (intrin->intrinsic == nir_intrinsic_vulkan_resource_index) {
+ lower_res_index_intrinsic(intrin, state);
state->progress = true;
+ }
break;
+ }
case nir_instr_type_tex:
lower_tex(nir_instr_as_tex(instr), state);
/* All texture instructions need lowering */
return true;
}
+static void
+setup_vec4_uniform_value(const union gl_constant_value **params,
+ const union gl_constant_value *values,
+ unsigned n)
+{
+ static const gl_constant_value zero = { 0 };
+
+ for (unsigned i = 0; i < n; ++i)
+ params[i] = &values[i];
+
+ for (unsigned i = n; i < 4; ++i)
+ params[i] = &zero;
+}
+
bool
anv_nir_apply_pipeline_layout(nir_shader *shader,
+ struct brw_stage_prog_data *prog_data,
const struct anv_pipeline_layout *layout)
{
struct apply_pipeline_layout_state state = {
.shader = shader,
- .stage = anv_vk_shader_stage_for_mesa_stage(shader->stage),
.layout = layout,
};
}
}
+ if (layout->stage[shader->stage].image_count > 0) {
+ nir_foreach_variable(var, &shader->uniforms) {
+ if (glsl_type_is_image(var->type) ||
+ (glsl_type_is_array(var->type) &&
+ glsl_type_is_image(glsl_get_array_element(var->type)))) {
+ /* Images are represented as uniform push constants and the actual
+ * information required for reading/writing to/from the image is
+ * storred in the uniform.
+ */
+ unsigned image_index = get_image_index(var->data.descriptor_set,
+ var->data.binding, &state);
+
+ var->data.driver_location = shader->num_uniforms +
+ image_index * BRW_IMAGE_PARAM_SIZE * 4;
+ }
+ }
+
+ struct anv_push_constants *null_data = NULL;
+ const gl_constant_value **param = prog_data->param + shader->num_uniforms;
+ const struct brw_image_param *image_param = null_data->images;
+ for (uint32_t i = 0; i < layout->stage[shader->stage].image_count; i++) {
+ setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SURFACE_IDX_OFFSET,
+ (const union gl_constant_value *)&image_param->surface_idx, 1);
+ setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_OFFSET_OFFSET,
+ (const union gl_constant_value *)image_param->offset, 2);
+ setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SIZE_OFFSET,
+ (const union gl_constant_value *)image_param->size, 3);
+ setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_STRIDE_OFFSET,
+ (const union gl_constant_value *)image_param->stride, 4);
+ setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_TILING_OFFSET,
+ (const union gl_constant_value *)image_param->tiling, 3);
+ setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SWIZZLING_OFFSET,
+ (const union gl_constant_value *)image_param->swizzling, 2);
+
+ param += BRW_IMAGE_PARAM_SIZE;
+ image_param ++;
+ }
+
+ shader->num_uniforms += layout->stage[shader->stage].image_count *
+ BRW_IMAGE_PARAM_SIZE * 4;
+ }
+
return state.progress;
}