return (v + a - 1) & ~(a - 1);
}
+static inline uint64_t
+align_u64(uint64_t v, uint64_t a)
+{
+ return (v + a - 1) & ~(a - 1);
+}
+
static inline int32_t
align_i32(int32_t v, int32_t a)
{
struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
};
+struct anv_state_stream_block;
+
struct anv_state_stream {
struct anv_block_pool *block_pool;
+
+ /* The current working block */
+ struct anv_state_stream_block *block;
+
+ /* Offset at which the current block starts */
+ uint32_t start;
+ /* Offset at which to allocate the next state */
uint32_t next;
- uint32_t current_block;
+ /* Offset at which the current block ends */
uint32_t end;
};
struct {
VkRenderPass render_pass;
+ /** Pipeline that blits from a 1D image. */
+ VkPipeline pipeline_1d_src;
+
/** Pipeline that blits from a 2D image. */
VkPipeline pipeline_2d_src;
struct anv_state_pool * pool;
};
+struct anv_pipeline_cache {
+ struct anv_device * device;
+ struct anv_state_stream program_stream;
+ pthread_mutex_t mutex;
+};
+
+void anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
+ struct anv_device *device);
+void anv_pipeline_cache_finish(struct anv_pipeline_cache *cache);
+
struct anv_device {
VK_LOADER_DATA _loader_data;
struct anv_state_pool dynamic_state_pool;
struct anv_block_pool instruction_block_pool;
+ struct anv_pipeline_cache default_pipeline_cache;
+
struct anv_block_pool surface_state_block_pool;
struct anv_state_pool surface_state_pool;
/* Index into the dynamic state array for a dynamic buffer */
int16_t dynamic_offset_index;
+ /* Index into the descriptor set buffer views */
+ int16_t buffer_index;
+
struct {
/* Index into the binding table for the associated surface */
int16_t surface_index;
/* Shader stages affected by this descriptor set */
uint16_t shader_stages;
+ /* Number of buffers in this descriptor set */
+ uint16_t buffer_count;
+
/* Number of dynamic offsets used by this descriptor set */
uint16_t dynamic_offset_count;
};
struct anv_buffer_view *buffer_view;
-
- struct {
- struct anv_buffer *buffer;
- uint64_t offset;
- uint64_t range;
- };
};
};
struct anv_descriptor_set {
const struct anv_descriptor_set_layout *layout;
+ struct anv_buffer_view *buffer_views;
struct anv_descriptor descriptors[0];
};
} urb;
VkShaderStageFlags active_stages;
- struct anv_state_stream program_stream;
struct anv_state blend_state;
uint32_t vs_simd8;
uint32_t vs_vec4;
VkResult
anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc);
VkResult
anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *info,
struct anv_shader_module *module,
const char *entrypoint_name);
VkResult
anv_graphics_pipeline_create(VkDevice device,
+ VkPipelineCache cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkResult
gen7_graphics_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkResult
gen75_graphics_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkResult
gen8_graphics_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen9_graphics_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen7_compute_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen75_compute_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen8_compute_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen9_compute_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
const char *name;
enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
const struct isl_format_layout *isl_layout;
- uint8_t num_channels;
uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
bool has_stencil;
};
anv_format_for_vk_format(VkFormat format);
enum isl_format
-anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect);
+anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect,
+ VkImageTiling tiling);
static inline bool
anv_format_is_color(const struct anv_format *format)
struct anv_image {
VkImageType type;
+ /* The original VkFormat provided by the client. This may not match any
+ * of the actual surface formats.
+ */
+ VkFormat vk_format;
const struct anv_format *format;
VkExtent3D extent;
uint32_t levels;
uint32_t array_size;
VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
+ VkImageTiling tiling; /** VkImageCreateInfo::tiling */
VkDeviceSize size;
uint32_t alignment;
struct anv_image_view {
const struct anv_image *image; /**< VkImageViewCreateInfo::image */
- const struct anv_format *format; /**< VkImageViewCreateInfo::format */
struct anv_bo *bo;
uint32_t offset; /**< Offset into bo. */
+
+ VkImageAspectFlags aspect_mask;
+ VkFormat vk_format;
+ enum isl_format format;
VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
/** RENDER_SURFACE_STATE when using image as a color render target. */
struct anv_state storage_surface_state;
};
+const struct anv_format *
+anv_format_for_descriptor_type(VkDescriptorType type);
+
void anv_fill_buffer_surface_state(struct anv_device *device, void *state,
enum isl_format format,
uint32_t offset, uint32_t range,
struct anv_render_pass {
uint32_t attachment_count;
uint32_t subpass_count;
+ uint32_t * subpass_attachments;
struct anv_render_pass_attachment * attachments;
struct anv_subpass subpasses[0];
};
struct anv_bo bo;
};
-void anv_device_init_meta(struct anv_device *device);
+VkResult anv_device_init_meta(struct anv_device *device);
void anv_device_finish_meta(struct anv_device *device);
void *anv_lookup_entrypoint(const char *name);
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
+ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, VkPipelineCache)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)