#define VK_PROTOTYPES
#include <vulkan/vulkan.h>
#include <vulkan/vulkan_intel.h>
+#include <vulkan/vk_icd.h>
#include "anv_entrypoints.h"
#include "anv_gen_macros.h"
extern "C" {
#endif
-#define ICD_LOADER_MAGIC 0x01CDC0DE
-
-typedef union _VK_LOADER_DATA {
- uintptr_t loaderMagic;
- void *loaderData;
-} VK_LOADER_DATA;
+#define MAX_VBS 32
+#define MAX_SETS 8
+#define MAX_RTS 8
+#define MAX_VIEWPORTS 16
+#define MAX_SCISSORS 16
+#define MAX_PUSH_CONSTANTS_SIZE 128
+#define MAX_DYNAMIC_BUFFERS 16
+#define MAX_IMAGES 8
+#define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
#define anv_noreturn __attribute__((__noreturn__))
#define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
static inline uint32_t
align_u32(uint32_t v, uint32_t a)
{
+ assert(a != 0 && a == (a & -a));
+ return (v + a - 1) & ~(a - 1);
+}
+
+static inline uint64_t
+align_u64(uint64_t v, uint64_t a)
+{
+ assert(a != 0 && a == (a & -a));
return (v + a - 1) & ~(a - 1);
}
static inline int32_t
align_i32(int32_t v, int32_t a)
{
+ assert(a != 0 && a == (a & -a));
return (v + a - 1) & ~(a - 1);
}
memcpy((dest), (src), (count) * sizeof(*(src))); \
})
+#define zero(x) (memset(&(x), 0, sizeof(x)))
+
/* Define no kernel as 1, since that's an illegal offset for a kernel */
#define NO_KERNEL 1
struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
};
+struct anv_state_stream_block;
+
struct anv_state_stream {
struct anv_block_pool *block_pool;
+
+ /* The current working block */
+ struct anv_state_stream_block *block;
+
+ /* Offset at which the current block starts */
+ uint32_t start;
+ /* Offset at which to allocate the next state */
uint32_t next;
- uint32_t current_block;
+ /* Offset at which the current block ends */
uint32_t end;
};
#define CACHELINE_SIZE 64
#define CACHELINE_MASK 63
-static void inline
-anv_state_clflush(struct anv_state state)
+static inline void
+anv_clflush_range(void *start, size_t size)
{
- /* state.map may not be cacheline aligned, so round down the start pointer
- * to a cacheline boundary so we flush all pages that contain the state.
- */
- void *end = state.map + state.alloc_size;
- void *p = (void *) (((uintptr_t) state.map) & ~CACHELINE_MASK);
+ void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
+ void *end = start + size;
- __builtin_ia32_sfence();
+ __builtin_ia32_mfence();
while (p < end) {
__builtin_ia32_clflush(p);
p += CACHELINE_SIZE;
}
}
+static void inline
+anv_state_clflush(struct anv_state state)
+{
+ anv_clflush_range(state.map, state.alloc_size);
+}
+
void anv_block_pool_init(struct anv_block_pool *pool,
struct anv_device *device, uint32_t block_size);
void anv_block_pool_finish(struct anv_block_pool *pool);
struct isl_device isl_dev;
};
+struct anv_wsi_interaface;
+
+#define VK_ICD_WSI_PLATFORM_MAX 5
+
struct anv_instance {
VK_LOADER_DATA _loader_data;
int physicalDeviceCount;
struct anv_physical_device physicalDevice;
- void * wayland_wsi;
+ struct anv_wsi_interface * wsi[VK_ICD_WSI_PLATFORM_MAX];
};
VkResult anv_init_wsi(struct anv_instance *instance);
void anv_finish_wsi(struct anv_instance *instance);
struct anv_meta_state {
+ VkAllocationCallbacks alloc;
+
+ /**
+ * Use array element `i` for images with `2^i` samples.
+ */
struct {
- struct anv_pipeline *color_pipeline;
+ /**
+ * Pipeline N is used to clear color attachment N of the current
+ * subpass.
+ *
+ * HACK: We use one pipeline per color attachment to work around the
+ * compiler's inability to dynamically set the render target index of
+ * the render target write message.
+ */
+ struct anv_pipeline *color_pipelines[MAX_RTS];
+
struct anv_pipeline *depth_only_pipeline;
struct anv_pipeline *stencil_only_pipeline;
struct anv_pipeline *depthstencil_pipeline;
- } clear;
+ } clear[1 + MAX_SAMPLES_LOG2];
struct {
VkRenderPass render_pass;
+ /** Pipeline that blits from a 1D image. */
+ VkPipeline pipeline_1d_src;
+
/** Pipeline that blits from a 2D image. */
VkPipeline pipeline_2d_src;
VkPipelineLayout pipeline_layout;
VkDescriptorSetLayout ds_layout;
} blit;
+
+ struct {
+ /** Pipeline [i] resolves an image with 2^(i+1) samples. */
+ VkPipeline pipelines[MAX_SAMPLES_LOG2];
+
+ VkRenderPass pass;
+ VkPipelineLayout pipeline_layout;
+ VkDescriptorSetLayout ds_layout;
+ } resolve;
};
struct anv_queue {
struct anv_state_pool * pool;
};
+struct anv_pipeline_cache {
+ struct anv_device * device;
+ struct anv_state_stream program_stream;
+ pthread_mutex_t mutex;
+
+ uint32_t total_size;
+ uint32_t table_size;
+ uint32_t kernel_count;
+ uint32_t *table;
+};
+
+void anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
+ struct anv_device *device);
+void anv_pipeline_cache_finish(struct anv_pipeline_cache *cache);
+uint32_t anv_pipeline_cache_search(struct anv_pipeline_cache *cache,
+ const unsigned char *sha1, void *prog_data);
+uint32_t anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
+ const unsigned char *sha1,
+ const void *kernel,
+ size_t kernel_size,
+ const void *prog_data,
+ size_t prog_data_size);
+
struct anv_device {
VK_LOADER_DATA _loader_data;
struct anv_state_pool dynamic_state_pool;
struct anv_block_pool instruction_block_pool;
+ struct anv_pipeline_cache default_pipeline_cache;
+
struct anv_block_pool surface_state_block_pool;
struct anv_state_pool surface_state_pool;
pthread_mutex_t mutex;
};
+VkResult gen7_init_device_state(struct anv_device *device);
+VkResult gen75_init_device_state(struct anv_device *device);
+VkResult gen8_init_device_state(struct anv_device *device);
+VkResult gen9_init_device_state(struct anv_device *device);
+
+void anv_device_get_cache_uuid(void *uuid);
+
+
void* anv_gem_mmap(struct anv_device *device,
uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
void anv_gem_munmap(void *p, uint64_t size);
int anv_gem_create_context(struct anv_device *device);
int anv_gem_destroy_context(struct anv_device *device, int context);
int anv_gem_get_param(int fd, uint32_t param);
+bool anv_gem_get_bit6_swizzle(int fd, uint32_t tiling);
int anv_gem_get_aperture(int fd, uint64_t *size);
int anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle);
uint32_t anv_gem_fd_to_handle(struct anv_device *device, int fd);
void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
void *location, struct anv_bo *bo, uint32_t offset);
+VkResult anv_device_submit_simple_batch(struct anv_device *device,
+ struct anv_batch *batch);
struct anv_address {
struct anv_bo *bo;
void *__dst = anv_batch_emit_dwords(batch, n); \
struct cmd __template = { \
__anv_cmd_header(cmd), \
- .DwordLength = n - __anv_cmd_length_bias(cmd), \
+ .DWordLength = n - __anv_cmd_length_bias(cmd), \
__VA_ARGS__ \
}; \
__anv_cmd_pack(cmd)(batch, __dst, &__template); \
/* Index into the dynamic state array for a dynamic buffer */
int16_t dynamic_offset_index;
+ /* Index into the descriptor set buffer views */
+ int16_t buffer_index;
+
struct {
/* Index into the binding table for the associated surface */
int16_t surface_index;
/* Shader stages affected by this descriptor set */
uint16_t shader_stages;
+ /* Number of buffers in this descriptor set */
+ uint16_t buffer_count;
+
/* Number of dynamic offsets used by this descriptor set */
uint16_t dynamic_offset_count;
union {
struct {
- union {
- struct anv_image_view *image_view;
- };
+ struct anv_image_view *image_view;
struct anv_sampler *sampler;
};
- struct {
- struct anv_buffer *buffer;
- uint64_t offset;
- uint64_t range;
- };
+ struct anv_buffer_view *buffer_view;
};
};
struct anv_descriptor_set {
const struct anv_descriptor_set_layout *layout;
+ uint32_t buffer_count;
+ struct anv_buffer_view *buffer_views;
struct anv_descriptor descriptors[0];
};
anv_descriptor_set_destroy(struct anv_device *device,
struct anv_descriptor_set *set);
-#define MAX_VBS 32
-#define MAX_SETS 8
-#define MAX_RTS 8
-#define MAX_VIEWPORTS 16
-#define MAX_SCISSORS 16
-#define MAX_PUSH_CONSTANTS_SIZE 128
-#define MAX_DYNAMIC_BUFFERS 16
-#define MAX_IMAGES 8
-
struct anv_pipeline_binding {
/* The descriptor set this surface corresponds to */
uint16_t set;
struct anv_device * device;
VkDeviceSize size;
+ VkBufferUsageFlags usage;
+
/* Set when bound */
struct anv_bo * bo;
VkDeviceSize offset;
const struct anv_dynamic_state *src,
uint32_t copy_mask);
+/**
+ * Attachment state when recording a renderpass instance.
+ *
+ * The clear value is valid only if there exists a pending clear.
+ */
+struct anv_attachment_state {
+ VkImageAspectFlags pending_clear_aspects;
+ VkClearValue clear_value;
+};
+
/** State required while building cmd buffer */
struct anv_cmd_state {
+ /* PIPELINE_SELECT.PipelineSelection */
uint32_t current_pipeline;
+ uint32_t current_l3_config;
uint32_t vb_dirty;
anv_cmd_dirty_mask_t dirty;
anv_cmd_dirty_mask_t compute_dirty;
+ uint32_t num_workgroups_offset;
+ struct anv_bo *num_workgroups_bo;
VkShaderStageFlags descriptors_dirty;
VkShaderStageFlags push_constants_dirty;
uint32_t scratch_size;
struct anv_vertex_binding vertex_bindings[MAX_VBS];
struct anv_descriptor_set * descriptors[MAX_SETS];
struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
+ struct anv_state binding_tables[MESA_SHADER_STAGES];
+ struct anv_state samplers[MESA_SHADER_STAGES];
struct anv_dynamic_state dynamic;
+ bool need_query_wa;
+
+ /**
+ * Array length is anv_cmd_state::pass::attachment_count. Array content is
+ * valid only when recording a render pass instance.
+ */
+ struct anv_attachment_state * attachments;
struct {
struct anv_buffer * index_buffer;
unsigned stage, struct anv_state *bt_state);
VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
unsigned stage, struct anv_state *state);
-void gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
+uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
+void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer *cmd_buffer,
+ uint32_t stages);
struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
const void *data, uint32_t size, uint32_t alignment);
struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
uint32_t *a, uint32_t *b,
uint32_t dwords, uint32_t alignment);
-void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
- struct anv_subpass *subpass);
struct anv_address
anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
-void gen7_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
- struct anv_subpass *subpass);
+void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
+ const VkRenderPassBeginInfo *info);
-void gen8_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
+void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
struct anv_subpass *subpass);
-void gen9_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
+void gen75_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
+ struct anv_subpass *subpass);
+void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
struct anv_subpass *subpass);
-
-void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
+void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
+ struct anv_subpass *subpass);
+void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
struct anv_subpass *subpass);
+void gen7_flush_pipeline_select_3d(struct anv_cmd_buffer *cmd_buffer);
+void gen75_flush_pipeline_select_3d(struct anv_cmd_buffer *cmd_buffer);
+void gen8_flush_pipeline_select_3d(struct anv_cmd_buffer *cmd_buffer);
+void gen9_flush_pipeline_select_3d(struct anv_cmd_buffer *cmd_buffer);
+
+void gen7_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
+void gen75_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
+void gen8_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
+void gen9_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
+
+void gen7_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
+void gen75_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
+void gen8_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
+void gen9_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
+
struct anv_state
anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
gl_shader_stage stage);
struct anv_state
anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer);
-void anv_cmd_buffer_clear_attachments(struct anv_cmd_buffer *cmd_buffer,
- struct anv_render_pass *pass,
- const VkClearValue *clear_values);
+void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer);
+void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer);
+
const struct anv_image_view *
anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
bool ready;
};
+struct anv_event {
+ uint64_t semaphore;
+ struct anv_state state;
+};
+
struct nir_shader;
struct anv_shader_module {
struct nir_shader * nir;
+ unsigned char sha1[20];
uint32_t size;
char data[0];
};
+void anv_hash_shader(unsigned char *hash, const void *key, size_t key_size,
+ struct anv_shader_module *module,
+ const char *entrypoint,
+ const VkSpecializationInfo *spec_info);
+
static inline gl_shader_stage
vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
{
return (1 << mesa_stage);
}
+#define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
+
#define anv_foreach_stage(stage, stage_bits) \
- for (gl_shader_stage stage, __tmp = (gl_shader_stage)(stage_bits);\
+ for (gl_shader_stage stage, \
+ __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
stage = __builtin_ffs(__tmp) - 1, __tmp; \
__tmp &= ~(1 << (stage)))
} urb;
VkShaderStageFlags active_stages;
- struct anv_state_stream program_stream;
struct anv_state blend_state;
uint32_t vs_simd8;
uint32_t vs_vec4;
uint32_t ps_ksp2;
uint32_t ps_grf_start0;
uint32_t ps_grf_start2;
- uint32_t gs_vec4;
- uint32_t gs_vertex_count;
+ uint32_t gs_kernel;
uint32_t cs_simd;
uint32_t vb_used;
};
struct anv_graphics_pipeline_create_info {
+ /**
+ * If non-negative, overrides the color attachment count of the pipeline's
+ * subpass.
+ */
+ int8_t color_attachment_count;
+
bool use_repclear;
bool disable_viewport;
bool disable_scissor;
VkResult
anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc);
VkResult
anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *info,
struct anv_shader_module *module,
- const char *entrypoint_name);
+ const char *entrypoint,
+ const VkSpecializationInfo *spec_info);
VkResult
anv_graphics_pipeline_create(VkDevice device,
+ VkPipelineCache cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkResult
gen7_graphics_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkResult
gen75_graphics_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkResult
gen8_graphics_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen9_graphics_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen7_compute_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen75_compute_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen8_compute_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
VkResult
gen9_compute_pipeline_create(VkDevice _device,
+ struct anv_pipeline_cache *cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
VkPipeline *pPipeline);
+struct anv_format_swizzle {
+ unsigned r:2;
+ unsigned g:2;
+ unsigned b:2;
+ unsigned a:2;
+};
+
struct anv_format {
const VkFormat vk_format;
const char *name;
- enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
+ enum isl_format isl_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
const struct isl_format_layout *isl_layout;
- uint8_t num_channels;
- uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
+ struct anv_format_swizzle swizzle;
+ bool has_depth;
bool has_stencil;
};
anv_format_for_vk_format(VkFormat format);
enum isl_format
-anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect);
+anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect,
+ VkImageTiling tiling, struct anv_format_swizzle *swizzle);
static inline bool
anv_format_is_color(const struct anv_format *format)
{
- return !format->depth_format && !format->has_stencil;
+ return !format->has_depth && !format->has_stencil;
}
static inline bool
anv_format_is_depth_or_stencil(const struct anv_format *format)
{
- return format->depth_format || format->has_stencil;
+ return format->has_depth || format->has_stencil;
}
/**
struct anv_image {
VkImageType type;
+ /* The original VkFormat provided by the client. This may not match any
+ * of the actual surface formats.
+ */
+ VkFormat vk_format;
const struct anv_format *format;
VkExtent3D extent;
uint32_t levels;
uint32_t array_size;
+ uint32_t samples; /**< VkImageCreateInfo::samples */
VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
+ VkImageTiling tiling; /** VkImageCreateInfo::tiling */
VkDeviceSize size;
uint32_t alignment;
struct anv_bo *bo;
VkDeviceSize offset;
- uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
-
- bool needs_nonrt_surface_state:1;
- bool needs_color_rt_surface_state:1;
- bool needs_storage_surface_state:1;
-
/**
* Image subsurfaces
*
struct anv_image_view {
const struct anv_image *image; /**< VkImageViewCreateInfo::image */
- const struct anv_format *format; /**< VkImageViewCreateInfo::format */
struct anv_bo *bo;
uint32_t offset; /**< Offset into bo. */
+
+ VkImageAspectFlags aspect_mask;
+ VkFormat vk_format;
+ VkComponentMapping swizzle;
+ enum isl_format format;
+ uint32_t base_layer;
+ uint32_t base_mip;
+ VkExtent3D level_0_extent; /**< Extent of ::image's level 0 adjusted for ::vk_format. */
VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
/** RENDER_SURFACE_STATE when using image as a color render target. */
struct anv_state color_rt_surface_state;
- /** RENDER_SURFACE_STATE when using image as a non render target. */
- struct anv_state nonrt_surface_state;
+ /** RENDER_SURFACE_STATE when using image as a sampler surface. */
+ struct anv_state sampler_surface_state;
/** RENDER_SURFACE_STATE when using image as a storage image. */
struct anv_state storage_surface_state;
void anv_image_view_init(struct anv_image_view *view,
struct anv_device *device,
const VkImageViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer);
+ struct anv_cmd_buffer *cmd_buffer,
+ uint32_t offset);
void
-gen7_image_view_init(struct anv_image_view *iview,
- struct anv_device *device,
- const VkImageViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer);
-
+anv_fill_image_surface_state(struct anv_device *device, struct anv_state state,
+ struct anv_image_view *iview,
+ const VkImageViewCreateInfo *pCreateInfo,
+ VkImageUsageFlagBits usage);
void
-gen75_image_view_init(struct anv_image_view *iview,
- struct anv_device *device,
- const VkImageViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer);
-
+gen7_fill_image_surface_state(struct anv_device *device, void *state_map,
+ struct anv_image_view *iview,
+ const VkImageViewCreateInfo *pCreateInfo,
+ VkImageUsageFlagBits usage);
void
-gen8_image_view_init(struct anv_image_view *iview,
- struct anv_device *device,
- const VkImageViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer);
-
+gen75_fill_image_surface_state(struct anv_device *device, void *state_map,
+ struct anv_image_view *iview,
+ const VkImageViewCreateInfo *pCreateInfo,
+ VkImageUsageFlagBits usage);
+void
+gen8_fill_image_surface_state(struct anv_device *device, void *state_map,
+ struct anv_image_view *iview,
+ const VkImageViewCreateInfo *pCreateInfo,
+ VkImageUsageFlagBits usage);
void
-gen9_image_view_init(struct anv_image_view *iview,
- struct anv_device *device,
- const VkImageViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer);
+gen9_fill_image_surface_state(struct anv_device *device, void *state_map,
+ struct anv_image_view *iview,
+ const VkImageViewCreateInfo *pCreateInfo,
+ VkImageUsageFlagBits usage);
+
+struct anv_buffer_view {
+ enum isl_format format; /**< VkBufferViewCreateInfo::format */
+ struct anv_bo *bo;
+ uint32_t offset; /**< Offset into bo. */
+ uint64_t range; /**< VkBufferViewCreateInfo::range */
-void anv_fill_buffer_surface_state(struct anv_device *device, void *state,
- const struct anv_format *format,
+ struct anv_state surface_state;
+ struct anv_state storage_surface_state;
+};
+
+const struct anv_format *
+anv_format_for_descriptor_type(VkDescriptorType type);
+
+void anv_fill_buffer_surface_state(struct anv_device *device,
+ struct anv_state state,
+ enum isl_format format,
uint32_t offset, uint32_t range,
uint32_t stride);
-void gen7_fill_buffer_surface_state(void *state, const struct anv_format *format,
+void gen7_fill_buffer_surface_state(void *state, enum isl_format format,
uint32_t offset, uint32_t range,
uint32_t stride);
-void gen75_fill_buffer_surface_state(void *state, const struct anv_format *format,
+void gen75_fill_buffer_surface_state(void *state, enum isl_format format,
uint32_t offset, uint32_t range,
uint32_t stride);
-void gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
+void gen8_fill_buffer_surface_state(void *state, enum isl_format format,
uint32_t offset, uint32_t range,
uint32_t stride);
-void gen9_fill_buffer_surface_state(void *state, const struct anv_format *format,
+void gen9_fill_buffer_surface_state(void *state, enum isl_format format,
uint32_t offset, uint32_t range,
uint32_t stride);
void anv_image_view_fill_image_param(struct anv_device *device,
struct anv_image_view *view,
struct brw_image_param *param);
+void anv_buffer_view_fill_image_param(struct anv_device *device,
+ struct anv_buffer_view *view,
+ struct brw_image_param *param);
struct anv_sampler {
uint32_t state[4];
uint32_t layers;
uint32_t attachment_count;
- const struct anv_image_view * attachments[0];
+ struct anv_image_view * attachments[0];
};
struct anv_subpass {
uint32_t * color_attachments;
uint32_t * resolve_attachments;
uint32_t depth_stencil_attachment;
+
+ /** Subpass has at least one resolve attachment */
+ bool has_resolve;
};
struct anv_render_pass_attachment {
struct anv_render_pass {
uint32_t attachment_count;
uint32_t subpass_count;
+ uint32_t * subpass_attachments;
struct anv_render_pass_attachment * attachments;
struct anv_subpass subpasses[0];
};
struct anv_bo bo;
};
-void anv_device_init_meta(struct anv_device *device);
+VkResult anv_device_init_meta(struct anv_device *device);
void anv_device_finish_meta(struct anv_device *device);
void *anv_lookup_entrypoint(const char *name);
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCommandPool)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
+ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view, VkBufferView)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
+ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event, VkEvent)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
+ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, VkPipelineCache)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)