anv/pipeline: Handle output lowering in anv_pipeline instead of spirv_to_nir
[mesa.git] / src / vulkan / gen7_state.c
index 108ebe7c225637b6aa3411a6399af7d17d79a4c6..88598cea18e5943ccafc9e9176ab717fb558520b 100644 (file)
 #include "gen7_pack.h"
 #include "gen75_pack.h"
 
-static const uint8_t
-anv_surftype(const struct anv_image *image, VkImageViewType view_type)
-{
-   switch (view_type) {
-   default:
-      unreachable("bad VkImageViewType");
-   case VK_IMAGE_VIEW_TYPE_1D:
-   case VK_IMAGE_VIEW_TYPE_1D_ARRAY:
-      assert(image->type == VK_IMAGE_TYPE_1D);
-      return SURFTYPE_1D;
-   case VK_IMAGE_VIEW_TYPE_CUBE:
-   case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY:
-      assert(image->type == VK_IMAGE_TYPE_2D);
-      return SURFTYPE_CUBE;
-   case VK_IMAGE_VIEW_TYPE_2D:
-   case VK_IMAGE_VIEW_TYPE_2D_ARRAY:
-      assert(image->type == VK_IMAGE_TYPE_2D);
-      return SURFTYPE_2D;
-   case VK_IMAGE_VIEW_TYPE_3D:
-      assert(image->type == VK_IMAGE_TYPE_3D);
-      return SURFTYPE_3D;
-   }
-}
+#include "genX_state_util.h"
 
 GENX_FUNC(GEN7, GEN75) void
-genX(fill_buffer_surface_state)(void *state, const struct anv_format *format,
+genX(fill_buffer_surface_state)(void *state, enum isl_format format,
                                 uint32_t offset, uint32_t range,
                                 uint32_t stride)
 {
@@ -65,7 +43,7 @@ genX(fill_buffer_surface_state)(void *state, const struct anv_format *format,
 
    struct GENX(RENDER_SURFACE_STATE) surface_state = {
       .SurfaceType                              = SURFTYPE_BUFFER,
-      .SurfaceFormat                            = format->surface_format,
+      .SurfaceFormat                            = format,
       .SurfaceVerticalAlignment                 = VALIGN_4,
       .SurfaceHorizontalAlignment               = HALIGN_4,
       .TiledSurface                             = false,
@@ -87,36 +65,6 @@ genX(fill_buffer_surface_state)(void *state, const struct anv_format *format,
    GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &surface_state);
 }
 
-static const uint32_t vk_to_gen_tex_filter[] = {
-   [VK_FILTER_NEAREST]                          = MAPFILTER_NEAREST,
-   [VK_FILTER_LINEAR]                           = MAPFILTER_LINEAR
-};
-
-static const uint32_t vk_to_gen_mipmap_mode[] = {
-   [VK_SAMPLER_MIPMAP_MODE_BASE]                = MIPFILTER_NONE,
-   [VK_SAMPLER_MIPMAP_MODE_NEAREST]             = MIPFILTER_NEAREST,
-   [VK_SAMPLER_MIPMAP_MODE_LINEAR]              = MIPFILTER_LINEAR
-};
-
-static const uint32_t vk_to_gen_tex_address[] = {
-   [VK_SAMPLER_ADDRESS_MODE_REPEAT]             = TCM_WRAP,
-   [VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT]    = TCM_MIRROR,
-   [VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE]      = TCM_CLAMP,
-   [VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE] = TCM_MIRROR_ONCE,
-   [VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER]    = TCM_CLAMP_BORDER,
-};
-
-static const uint32_t vk_to_gen_compare_op[] = {
-   [VK_COMPARE_OP_NEVER]                        = PREFILTEROPNEVER,
-   [VK_COMPARE_OP_LESS]                         = PREFILTEROPLESS,
-   [VK_COMPARE_OP_EQUAL]                        = PREFILTEROPEQUAL,
-   [VK_COMPARE_OP_LESS_OR_EQUAL]                = PREFILTEROPLEQUAL,
-   [VK_COMPARE_OP_GREATER]                      = PREFILTEROPGREATER,
-   [VK_COMPARE_OP_NOT_EQUAL]                    = PREFILTEROPNOTEQUAL,
-   [VK_COMPARE_OP_GREATER_OR_EQUAL]             = PREFILTEROPGEQUAL,
-   [VK_COMPARE_OP_ALWAYS]                       = PREFILTEROPALWAYS,
-};
-
 static struct anv_state
 alloc_surface_state(struct anv_device *device,
                     struct anv_cmd_buffer *cmd_buffer)
@@ -207,24 +155,6 @@ static const uint8_t anv_valign[] = {
     [4] = VALIGN_4,
 };
 
-static const uint32_t vk_to_gen_swizzle_map[] = {
-   [VK_COMPONENT_SWIZZLE_ZERO]                 = SCS_ZERO,
-   [VK_COMPONENT_SWIZZLE_ONE]                  = SCS_ONE,
-   [VK_COMPONENT_SWIZZLE_R]                    = SCS_RED,
-   [VK_COMPONENT_SWIZZLE_G]                    = SCS_GREEN,
-   [VK_COMPONENT_SWIZZLE_B]                    = SCS_BLUE,
-   [VK_COMPONENT_SWIZZLE_A]                    = SCS_ALPHA
-};
-
-static inline uint32_t
-vk_to_gen_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component)
-{
-   if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
-      return vk_to_gen_swizzle_map[component];
-   else
-      return vk_to_gen_swizzle_map[swizzle];
-}
-
 GENX_FUNC(GEN7, GEN75) void
 genX(image_view_init)(struct anv_image_view *iview,
                       struct anv_device *device,
@@ -238,23 +168,9 @@ genX(image_view_init)(struct anv_image_view *iview,
    struct anv_surface *surface =
       anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
 
-   const struct anv_format *format =
-      anv_format_for_vk_format(pCreateInfo->format);
-
    if (pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_2D)
       anv_finishme("non-2D image views");
 
-   iview->image = image;
-   iview->bo = image->bo;
-   iview->offset = image->offset + surface->offset;
-   iview->format = anv_format_for_vk_format(pCreateInfo->format);
-
-   iview->extent = (VkExtent3D) {
-      .width = anv_minify(image->extent.width, range->baseMipLevel),
-      .height = anv_minify(image->extent.height, range->baseMipLevel),
-      .depth = anv_minify(image->extent.depth, range->baseMipLevel),
-   };
-
    uint32_t depth = 1;
    if (range->layerCount > 1) {
       depth = range->layerCount;
@@ -266,9 +182,9 @@ genX(image_view_init)(struct anv_image_view *iview,
       isl_surf_get_image_alignment_sa(&surface->isl);
 
    struct GENX(RENDER_SURFACE_STATE) surface_state = {
-      .SurfaceType = anv_surftype(image, pCreateInfo->viewType),
+      .SurfaceType = anv_surftype(image, pCreateInfo->viewType, false),
       .SurfaceArray = image->array_size > 1,
-      .SurfaceFormat = format->surface_format,
+      .SurfaceFormat = iview->format,
       .SurfaceVerticalAlignment = anv_valign[image_align_sa.height],
       .SurfaceHorizontalAlignment = anv_halign[image_align_sa.width],
 
@@ -328,13 +244,15 @@ genX(image_view_init)(struct anv_image_view *iview,
        * sampler engine is [SurfaceMinLOD, SurfaceMinLOD + MIPCountLOD].
        */
       surface_state.SurfaceMinLOD = range->baseMipLevel;
-      surface_state.MIPCountLOD = range->levelCount - 1;
+      surface_state.MIPCountLOD = MAX2(range->levelCount, 1) - 1;
 
       GENX(RENDER_SURFACE_STATE_pack)(NULL, iview->nonrt_surface_state.map,
                                       &surface_state);
 
       if (!device->info.has_llc)
          anv_state_clflush(iview->nonrt_surface_state);
+   } else {
+      iview->nonrt_surface_state.alloc_size = 0;
    }
 
    if (image->needs_color_rt_surface_state) {
@@ -355,19 +273,25 @@ genX(image_view_init)(struct anv_image_view *iview,
                                       &surface_state);
       if (!device->info.has_llc)
          anv_state_clflush(iview->color_rt_surface_state);
+   } else {
+      iview->color_rt_surface_state.alloc_size = 0;
    }
 
    if (image->needs_storage_surface_state) {
       iview->storage_surface_state = alloc_surface_state(device, cmd_buffer);
 
+      surface_state.SurfaceType =
+         anv_surftype(image, pCreateInfo->viewType, true),
+
       surface_state.SurfaceFormat =
-         isl_lower_storage_image_format(&device->isl_dev,
-                                        format->surface_format);
+         isl_lower_storage_image_format(&device->isl_dev, iview->format);
 
       surface_state.SurfaceMinLOD = range->baseMipLevel;
-      surface_state.MIPCountLOD = range->levelCount - 1;
+      surface_state.MIPCountLOD = MAX2(range->levelCount, 1) - 1;
 
       GENX(RENDER_SURFACE_STATE_pack)(NULL, iview->storage_surface_state.map,
                                       &surface_state);
+   } else {
+      iview->storage_surface_state.alloc_size = 0;
    }
 }