anv/pipeline: Handle output lowering in anv_pipeline instead of spirv_to_nir
[mesa.git] / src / vulkan / gen7_state.c
index e6c544053defc69e7c89fdd1a536ca9cd8260260..88598cea18e5943ccafc9e9176ab717fb558520b 100644 (file)
 #include "gen7_pack.h"
 #include "gen75_pack.h"
 
+#include "genX_state_util.h"
+
 GENX_FUNC(GEN7, GEN75) void
-genX(fill_buffer_surface_state)(void *state, const struct anv_format *format,
+genX(fill_buffer_surface_state)(void *state, enum isl_format format,
                                 uint32_t offset, uint32_t range,
                                 uint32_t stride)
 {
@@ -41,7 +43,7 @@ genX(fill_buffer_surface_state)(void *state, const struct anv_format *format,
 
    struct GENX(RENDER_SURFACE_STATE) surface_state = {
       .SurfaceType                              = SURFTYPE_BUFFER,
-      .SurfaceFormat                            = format->surface_format,
+      .SurfaceFormat                            = format,
       .SurfaceVerticalAlignment                 = VALIGN_4,
       .SurfaceHorizontalAlignment               = HALIGN_4,
       .TiledSurface                             = false,
@@ -63,36 +65,6 @@ genX(fill_buffer_surface_state)(void *state, const struct anv_format *format,
    GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &surface_state);
 }
 
-static const uint32_t vk_to_gen_tex_filter[] = {
-   [VK_TEX_FILTER_NEAREST]                      = MAPFILTER_NEAREST,
-   [VK_TEX_FILTER_LINEAR]                       = MAPFILTER_LINEAR
-};
-
-static const uint32_t vk_to_gen_mipmap_mode[] = {
-   [VK_TEX_MIPMAP_MODE_BASE]                    = MIPFILTER_NONE,
-   [VK_TEX_MIPMAP_MODE_NEAREST]                 = MIPFILTER_NEAREST,
-   [VK_TEX_MIPMAP_MODE_LINEAR]                  = MIPFILTER_LINEAR
-};
-
-static const uint32_t vk_to_gen_tex_address[] = {
-   [VK_TEX_ADDRESS_MODE_WRAP]                   = TCM_WRAP,
-   [VK_TEX_ADDRESS_MODE_MIRROR]                 = TCM_MIRROR,
-   [VK_TEX_ADDRESS_MODE_CLAMP]                  = TCM_CLAMP,
-   [VK_TEX_ADDRESS_MODE_MIRROR_ONCE]            = TCM_MIRROR_ONCE,
-   [VK_TEX_ADDRESS_MODE_CLAMP_BORDER]           = TCM_CLAMP_BORDER,
-};
-
-static const uint32_t vk_to_gen_compare_op[] = {
-   [VK_COMPARE_OP_NEVER]                        = PREFILTEROPNEVER,
-   [VK_COMPARE_OP_LESS]                         = PREFILTEROPLESS,
-   [VK_COMPARE_OP_EQUAL]                        = PREFILTEROPEQUAL,
-   [VK_COMPARE_OP_LESS_EQUAL]                   = PREFILTEROPLEQUAL,
-   [VK_COMPARE_OP_GREATER]                      = PREFILTEROPGREATER,
-   [VK_COMPARE_OP_NOT_EQUAL]                    = PREFILTEROPNOTEQUAL,
-   [VK_COMPARE_OP_GREATER_EQUAL]                = PREFILTEROPGEQUAL,
-   [VK_COMPARE_OP_ALWAYS]                       = PREFILTEROPALWAYS,
-};
-
 static struct anv_state
 alloc_surface_state(struct anv_device *device,
                     struct anv_cmd_buffer *cmd_buffer)
@@ -107,6 +79,7 @@ alloc_surface_state(struct anv_device *device,
 VkResult genX(CreateSampler)(
     VkDevice                                    _device,
     const VkSamplerCreateInfo*                  pCreateInfo,
+    const VkAllocationCallbacks*                pAllocator,
     VkSampler*                                  pSampler)
 {
    ANV_FROM_HANDLE(anv_device, device, _device);
@@ -115,8 +88,8 @@ VkResult genX(CreateSampler)(
 
    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
 
-   sampler = anv_device_alloc(device, sizeof(*sampler), 8,
-                              VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
+   sampler = anv_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8,
+                        VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
    if (!sampler)
       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 
@@ -134,7 +107,7 @@ VkResult genX(CreateSampler)(
       .SamplerDisable = false,
       .TextureBorderColorMode = DX10OGL,
       .BaseMipLevel = 0.0,
-      .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipMode],
+      .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipmapMode],
       .MagModeFilter = mag_filter,
       .MinModeFilter = min_filter,
       .TextureLODBias = pCreateInfo->mipLodBias * 256,
@@ -182,24 +155,6 @@ static const uint8_t anv_valign[] = {
     [4] = VALIGN_4,
 };
 
-static const uint32_t vk_to_gen_swizzle_map[] = {
-   [VK_COMPONENT_SWIZZLE_ZERO]                 = SCS_ZERO,
-   [VK_COMPONENT_SWIZZLE_ONE]                  = SCS_ONE,
-   [VK_COMPONENT_SWIZZLE_R]                    = SCS_RED,
-   [VK_COMPONENT_SWIZZLE_G]                    = SCS_GREEN,
-   [VK_COMPONENT_SWIZZLE_B]                    = SCS_BLUE,
-   [VK_COMPONENT_SWIZZLE_A]                    = SCS_ALPHA
-};
-
-static inline uint32_t
-vk_to_gen_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component)
-{
-   if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
-      return vk_to_gen_swizzle_map[component];
-   else
-      return vk_to_gen_swizzle_map[swizzle];
-}
-
 GENX_FUNC(GEN7, GEN75) void
 genX(image_view_init)(struct anv_image_view *iview,
                       struct anv_device *device,
@@ -213,42 +168,31 @@ genX(image_view_init)(struct anv_image_view *iview,
    struct anv_surface *surface =
       anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
 
-   const struct anv_format *format =
-      anv_format_for_vk_format(pCreateInfo->format);
-
    if (pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_2D)
       anv_finishme("non-2D image views");
 
-   iview->image = image;
-   iview->bo = image->bo;
-   iview->offset = image->offset + surface->offset;
-   iview->format = anv_format_for_vk_format(pCreateInfo->format);
-
-   iview->extent = (VkExtent3D) {
-      .width = anv_minify(image->extent.width, range->baseMipLevel),
-      .height = anv_minify(image->extent.height, range->baseMipLevel),
-      .depth = anv_minify(image->extent.depth, range->baseMipLevel),
-   };
-
    uint32_t depth = 1;
-   if (range->arraySize > 1) {
-      depth = range->arraySize;
+   if (range->layerCount > 1) {
+      depth = range->layerCount;
    } else if (image->extent.depth > 1) {
       depth = image->extent.depth;
    }
 
+   const struct isl_extent3d image_align_sa =
+      isl_surf_get_image_alignment_sa(&surface->isl);
+
    struct GENX(RENDER_SURFACE_STATE) surface_state = {
-      .SurfaceType = image->surface_type,
+      .SurfaceType = anv_surftype(image, pCreateInfo->viewType, false),
       .SurfaceArray = image->array_size > 1,
-      .SurfaceFormat = format->surface_format,
-      .SurfaceVerticalAlignment = anv_valign[surface->v_align],
-      .SurfaceHorizontalAlignment = anv_halign[surface->h_align],
+      .SurfaceFormat = iview->format,
+      .SurfaceVerticalAlignment = anv_valign[image_align_sa.height],
+      .SurfaceHorizontalAlignment = anv_halign[image_align_sa.width],
 
       /* From bspec (DevSNB, DevIVB): "Set Tile Walk to TILEWALK_XMAJOR if
        * Tiled Surface is False."
        */
-      .TiledSurface = surface->tiling != ISL_TILING_LINEAR,
-      .TileWalk = surface->tiling == ISL_TILING_Y ?
+      .TiledSurface = surface->isl.tiling != ISL_TILING_LINEAR,
+      .TileWalk = surface->isl.tiling == ISL_TILING_Y0 ?
                   TILEWALK_YMAJOR : TILEWALK_XMAJOR,
 
       .VerticalLineStride = 0,
@@ -259,7 +203,7 @@ genX(image_view_init)(struct anv_image_view *iview,
       .Height = image->extent.height - 1,
       .Width = image->extent.width - 1,
       .Depth = depth - 1,
-      .SurfacePitch = surface->stride - 1,
+      .SurfacePitch = surface->isl.row_pitch - 1,
       .MinimumArrayElement = range->baseArrayLayer,
       .NumberofMultisamples = MULTISAMPLECOUNT_1,
       .XOffset = 0,
@@ -300,10 +244,15 @@ genX(image_view_init)(struct anv_image_view *iview,
        * sampler engine is [SurfaceMinLOD, SurfaceMinLOD + MIPCountLOD].
        */
       surface_state.SurfaceMinLOD = range->baseMipLevel;
-      surface_state.MIPCountLOD = range->mipLevels - 1;
+      surface_state.MIPCountLOD = MAX2(range->levelCount, 1) - 1;
 
       GENX(RENDER_SURFACE_STATE_pack)(NULL, iview->nonrt_surface_state.map,
                                       &surface_state);
+
+      if (!device->info.has_llc)
+         anv_state_clflush(iview->nonrt_surface_state);
+   } else {
+      iview->nonrt_surface_state.alloc_size = 0;
    }
 
    if (image->needs_color_rt_surface_state) {
@@ -322,5 +271,27 @@ genX(image_view_init)(struct anv_image_view *iview,
 
       GENX(RENDER_SURFACE_STATE_pack)(NULL, iview->color_rt_surface_state.map,
                                       &surface_state);
+      if (!device->info.has_llc)
+         anv_state_clflush(iview->color_rt_surface_state);
+   } else {
+      iview->color_rt_surface_state.alloc_size = 0;
+   }
+
+   if (image->needs_storage_surface_state) {
+      iview->storage_surface_state = alloc_surface_state(device, cmd_buffer);
+
+      surface_state.SurfaceType =
+         anv_surftype(image, pCreateInfo->viewType, true),
+
+      surface_state.SurfaceFormat =
+         isl_lower_storage_image_format(&device->isl_dev, iview->format);
+
+      surface_state.SurfaceMinLOD = range->baseMipLevel;
+      surface_state.MIPCountLOD = MAX2(range->levelCount, 1) - 1;
+
+      GENX(RENDER_SURFACE_STATE_pack)(NULL, iview->storage_surface_state.map,
+                                      &surface_state);
+   } else {
+      iview->storage_surface_state.alloc_size = 0;
    }
 }