#include "anv_private.h"
-VkResult gen8_CreateDynamicRasterState(
- VkDevice _device,
- const VkDynamicRasterStateCreateInfo* pCreateInfo,
- VkDynamicRasterState* pState)
-{
- ANV_FROM_HANDLE(anv_device, device, _device);
- struct anv_dynamic_rs_state *state;
-
- assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_RASTER_STATE_CREATE_INFO);
-
- state = anv_device_alloc(device, sizeof(*state), 8,
- VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
- if (state == NULL)
- return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
-
- struct GEN8_3DSTATE_SF sf = {
- GEN8_3DSTATE_SF_header,
- .LineWidth = pCreateInfo->lineWidth,
- };
-
- GEN8_3DSTATE_SF_pack(NULL, state->state_sf, &sf);
-
- bool enable_bias = pCreateInfo->depthBias != 0.0f ||
- pCreateInfo->slopeScaledDepthBias != 0.0f;
- struct GEN8_3DSTATE_RASTER raster = {
- .GlobalDepthOffsetEnableSolid = enable_bias,
- .GlobalDepthOffsetEnableWireframe = enable_bias,
- .GlobalDepthOffsetEnablePoint = enable_bias,
- .GlobalDepthOffsetConstant = pCreateInfo->depthBias,
- .GlobalDepthOffsetScale = pCreateInfo->slopeScaledDepthBias,
- .GlobalDepthOffsetClamp = pCreateInfo->depthBiasClamp
- };
-
- GEN8_3DSTATE_RASTER_pack(NULL, state->state_raster, &raster);
-
- *pState = anv_dynamic_rs_state_to_handle(state);
-
- return VK_SUCCESS;
-}
+#include "gen8_pack.h"
+#include "gen9_pack.h"
void
-gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
- uint32_t offset, uint32_t range)
+genX(fill_buffer_surface_state)(void *state, const struct anv_format *format,
+ uint32_t offset, uint32_t range, uint32_t stride)
{
- /* This assumes RGBA float format. */
- uint32_t stride = 4;
uint32_t num_elements = range / stride;
- struct GEN8_RENDER_SURFACE_STATE surface_state = {
+ struct GENX(RENDER_SURFACE_STATE) surface_state = {
.SurfaceType = SURFTYPE_BUFFER,
.SurfaceArray = false,
.SurfaceFormat = format->surface_format,
.TileMode = LINEAR,
.SamplerL2BypassModeDisable = true,
.RenderCacheReadWriteMode = WriteOnlyCache,
- .MemoryObjectControlState = GEN8_MOCS,
- .Height = (num_elements >> 7) & 0x3fff,
- .Width = num_elements & 0x7f,
- .Depth = (num_elements >> 21) & 0x3f,
+ .MemoryObjectControlState = GENX(MOCS),
+ .Height = ((num_elements - 1) >> 7) & 0x3fff,
+ .Width = (num_elements - 1) & 0x7f,
+ .Depth = ((num_elements - 1) >> 21) & 0x3f,
.SurfacePitch = stride - 1,
.NumberofMultisamples = MULTISAMPLECOUNT_1,
.ShaderChannelSelectRed = SCS_RED,
.SurfaceBaseAddress = { NULL, offset },
};
- GEN8_RENDER_SURFACE_STATE_pack(NULL, state, &surface_state);
-}
-
-VkResult gen8_CreateBufferView(
- VkDevice _device,
- const VkBufferViewCreateInfo* pCreateInfo,
- VkBufferView* pView)
-{
- ANV_FROM_HANDLE(anv_device, device, _device);
- struct anv_buffer_view *view;
- VkResult result;
-
- result = anv_buffer_view_create(device, pCreateInfo, &view);
- if (result != VK_SUCCESS)
- return result;
-
- const struct anv_format *format =
- anv_format_for_vk_format(pCreateInfo->format);
-
- gen8_fill_buffer_surface_state(view->view.surface_state.map, format,
- view->view.offset, pCreateInfo->range);
-
- *pView = anv_buffer_view_to_handle(view);
-
- return VK_SUCCESS;
+ GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &surface_state);
}
static const uint8_t anv_halign[] = {
[16] = VALIGN16,
};
+static struct anv_state
+alloc_surface_state(struct anv_device *device,
+ struct anv_cmd_buffer *cmd_buffer)
+{
+ if (cmd_buffer) {
+ return anv_cmd_buffer_alloc_surface_state(cmd_buffer);
+ } else {
+ return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
+ }
+}
+
+static const uint32_t vk_to_gen_swizzle_map[] = {
+ [VK_COMPONENT_SWIZZLE_ZERO] = SCS_ZERO,
+ [VK_COMPONENT_SWIZZLE_ONE] = SCS_ONE,
+ [VK_COMPONENT_SWIZZLE_R] = SCS_RED,
+ [VK_COMPONENT_SWIZZLE_G] = SCS_GREEN,
+ [VK_COMPONENT_SWIZZLE_B] = SCS_BLUE,
+ [VK_COMPONENT_SWIZZLE_A] = SCS_ALPHA
+};
+
+static inline uint32_t
+vk_to_gen_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component)
+{
+ if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
+ return vk_to_gen_swizzle_map[component];
+ else
+ return vk_to_gen_swizzle_map[swizzle];
+}
+
void
-gen8_image_view_init(struct anv_image_view *iview,
- struct anv_device *device,
- const VkImageViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer)
+genX(image_view_init)(struct anv_image_view *iview,
+ struct anv_device *device,
+ const VkImageViewCreateInfo* pCreateInfo,
+ struct anv_cmd_buffer *cmd_buffer)
{
ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
- struct anv_surface_view *view = &iview->view;
- struct anv_surface *surface;
-
- const struct anv_format *format_info =
- anv_format_for_vk_format(pCreateInfo->format);
- const struct anv_image_view_info *view_type_info =
- anv_image_view_info_for_vk_image_view_type(pCreateInfo->viewType);
+ struct anv_surface *surface =
+ anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
- if (pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_2D)
- anv_finishme("non-2D image views");
+ uint32_t depth = 1; /* RENDER_SURFACE_STATE::Depth */
+ uint32_t rt_view_extent = 1; /* RENDER_SURFACE_STATE::RenderTargetViewExtent */
- switch (pCreateInfo->subresourceRange.aspect) {
- case VK_IMAGE_ASPECT_STENCIL:
- anv_finishme("stencil image views");
- abort();
- break;
- case VK_IMAGE_ASPECT_DEPTH:
- case VK_IMAGE_ASPECT_COLOR:
- view->offset = image->offset;
- surface = &image->primary_surface;
- break;
- default:
- unreachable("");
- break;
- }
+ const struct anv_format *format_info =
+ anv_format_for_vk_format(pCreateInfo->format);
- view->bo = image->bo;
- view->offset = image->offset + surface->offset;
- view->format = format_info;
+ iview->image = image;
+ iview->bo = image->bo;
+ iview->offset = image->offset + surface->offset;
+ iview->format = format_info;
iview->extent = (VkExtent3D) {
.width = anv_minify(image->extent.width, range->baseMipLevel),
.depth = anv_minify(image->extent.depth, range->baseMipLevel),
};
- uint32_t depth = 1;
- if (range->arraySize > 1) {
- depth = range->arraySize;
- } else if (image->extent.depth > 1) {
+ switch (image->type) {
+ case VK_IMAGE_TYPE_1D:
+ case VK_IMAGE_TYPE_2D:
+ /* From the Broadwell PRM >> RENDER_SURFACE_STATE::Depth:
+ *
+ * For SURFTYPE_1D, 2D, and CUBE: The range of this field is reduced
+ * by one for each increase from zero of Minimum Array Element. For
+ * example, if Minimum Array Element is set to 1024 on a 2D surface,
+ * the range of this field is reduced to [0,1023].
+ */
+ depth = range->layerCount;
+
+ /* From the Broadwell PRM >> RENDER_SURFACE_STATE::RenderTargetViewExtent:
+ *
+ * For Render Target and Typed Dataport 1D and 2D Surfaces:
+ * This field must be set to the same value as the Depth field.
+ */
+ rt_view_extent = depth;
+ break;
+ case VK_IMAGE_TYPE_3D:
+ /* From the Broadwell PRM >> RENDER_SURFACE_STATE::Depth:
+ *
+ * If the volume texture is MIP-mapped, this field specifies the
+ * depth of the base MIP level.
+ */
depth = image->extent.depth;
+
+ /* From the Broadwell PRM >> RENDER_SURFACE_STATE::RenderTargetViewExtent:
+ *
+ * For Render Target and Typed Dataport 3D Surfaces: This field
+ * indicates the extent of the accessible 'R' coordinates minus 1 on
+ * the LOD currently being rendered to.
+ */
+ rt_view_extent = iview->extent.depth;
+ break;
+ default:
+ unreachable(!"bad VkImageType");
}
- static const uint32_t vk_to_gen_swizzle[] = {
- [VK_CHANNEL_SWIZZLE_ZERO] = SCS_ZERO,
- [VK_CHANNEL_SWIZZLE_ONE] = SCS_ONE,
- [VK_CHANNEL_SWIZZLE_R] = SCS_RED,
- [VK_CHANNEL_SWIZZLE_G] = SCS_GREEN,
- [VK_CHANNEL_SWIZZLE_B] = SCS_BLUE,
- [VK_CHANNEL_SWIZZLE_A] = SCS_ALPHA
+ static const uint8_t isl_to_gen_tiling[] = {
+ [ISL_TILING_LINEAR] = LINEAR,
+ [ISL_TILING_X] = XMAJOR,
+ [ISL_TILING_Y] = YMAJOR,
+ [ISL_TILING_Yf] = YMAJOR,
+ [ISL_TILING_Ys] = YMAJOR,
+ [ISL_TILING_W] = WMAJOR,
};
- struct GEN8_RENDER_SURFACE_STATE surface_state = {
- .SurfaceType = view_type_info->surface_type,
+ struct GENX(RENDER_SURFACE_STATE) surface_state = {
+ .SurfaceType = image->surface_type,
.SurfaceArray = image->array_size > 1,
.SurfaceFormat = format_info->surface_format,
.SurfaceVerticalAlignment = anv_valign[surface->v_align],
.SurfaceHorizontalAlignment = anv_halign[surface->h_align],
- .TileMode = surface->tile_mode,
+ .TileMode = isl_to_gen_tiling[surface->tiling],
.VerticalLineStride = 0,
.VerticalLineStrideOffset = 0,
.SamplerL2BypassModeDisable = true,
.RenderCacheReadWriteMode = WriteOnlyCache,
- .MemoryObjectControlState = GEN8_MOCS,
+ .MemoryObjectControlState = GENX(MOCS),
/* The driver sets BaseMipLevel in SAMPLER_STATE, not here in
* RENDER_SURFACE_STATE. The Broadwell PRM says "it is illegal to have
.Width = image->extent.width - 1,
.Depth = depth - 1,
.SurfacePitch = surface->stride - 1,
- .MinimumArrayElement = range->baseArraySlice,
+ .RenderTargetViewExtent = rt_view_extent - 1,
+ .MinimumArrayElement = range->baseArrayLayer,
.NumberofMultisamples = MULTISAMPLECOUNT_1,
.XOffset = 0,
.YOffset = 0,
- /* For sampler surfaces, the hardware interprets field MIPCount/LOD as
- * MIPCount. The range of levels accessible by the sampler engine is
- * [SurfaceMinLOD, SurfaceMinLOD + MIPCountLOD].
- */
- .MIPCountLOD = range->mipLevels - 1,
- .SurfaceMinLOD = range->baseMipLevel,
+ .MIPCountLOD = 0, /* TEMPLATE */
+ .SurfaceMinLOD = 0, /* TEMPLATE */
.AuxiliarySurfaceMode = AUX_NONE,
.RedClearColor = 0,
.GreenClearColor = 0,
.BlueClearColor = 0,
.AlphaClearColor = 0,
- .ShaderChannelSelectRed = vk_to_gen_swizzle[pCreateInfo->channels.r],
- .ShaderChannelSelectGreen = vk_to_gen_swizzle[pCreateInfo->channels.g],
- .ShaderChannelSelectBlue = vk_to_gen_swizzle[pCreateInfo->channels.b],
- .ShaderChannelSelectAlpha = vk_to_gen_swizzle[pCreateInfo->channels.a],
+ .ShaderChannelSelectRed = vk_to_gen_swizzle(pCreateInfo->components.r,
+ VK_COMPONENT_SWIZZLE_R),
+ .ShaderChannelSelectGreen = vk_to_gen_swizzle(pCreateInfo->components.g,
+ VK_COMPONENT_SWIZZLE_G),
+ .ShaderChannelSelectBlue = vk_to_gen_swizzle(pCreateInfo->components.b,
+ VK_COMPONENT_SWIZZLE_B),
+ .ShaderChannelSelectAlpha = vk_to_gen_swizzle(pCreateInfo->components.a,
+ VK_COMPONENT_SWIZZLE_A),
.ResourceMinLOD = 0.0,
- .SurfaceBaseAddress = { NULL, view->offset },
+ .SurfaceBaseAddress = { NULL, iview->offset },
};
- if (cmd_buffer) {
- view->surface_state =
- anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64);
- } else {
- view->surface_state =
- anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
- }
-
- GEN8_RENDER_SURFACE_STATE_pack(NULL, view->surface_state.map, &surface_state);
-}
-
-VkResult
-gen8_CreateImageView(VkDevice _device,
- const VkImageViewCreateInfo *pCreateInfo,
- VkImageView *pView)
-{
- ANV_FROM_HANDLE(anv_device, device, _device);
- struct anv_image_view *view;
-
- view = anv_device_alloc(device, sizeof(*view), 8,
- VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
- if (view == NULL)
- return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
-
- anv_image_view_init(view, device, pCreateInfo, NULL);
-
- *pView = anv_image_view_to_handle(view);
-
- return VK_SUCCESS;
-}
-
-void
-gen8_color_attachment_view_init(struct anv_color_attachment_view *aview,
- struct anv_device *device,
- const VkAttachmentViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer)
-{
- ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
- struct anv_surface_view *view = &aview->view;
- struct anv_surface *surface = &image->primary_surface;
- const struct anv_format *format_info =
- anv_format_for_vk_format(pCreateInfo->format);
-
- aview->base.attachment_type = ANV_ATTACHMENT_VIEW_TYPE_COLOR;
-
- anv_assert(pCreateInfo->arraySize > 0);
- anv_assert(pCreateInfo->mipLevel < image->levels);
- anv_assert(pCreateInfo->baseArraySlice + pCreateInfo->arraySize <= image->array_size);
+ if (image->needs_nonrt_surface_state) {
+ iview->nonrt_surface_state =
+ alloc_surface_state(device, cmd_buffer);
- view->bo = image->bo;
- view->offset = image->offset + surface->offset;
- view->format = anv_format_for_vk_format(pCreateInfo->format);
-
- aview->base.extent = (VkExtent3D) {
- .width = anv_minify(image->extent.width, pCreateInfo->mipLevel),
- .height = anv_minify(image->extent.height, pCreateInfo->mipLevel),
- .depth = anv_minify(image->extent.depth, pCreateInfo->mipLevel),
- };
-
- uint32_t depth = 1;
- if (pCreateInfo->arraySize > 1) {
- depth = pCreateInfo->arraySize;
- } else if (image->extent.depth > 1) {
- depth = image->extent.depth;
- }
+ /* For non render target surfaces, the hardware interprets field
+ * MIPCount/LOD as MIPCount. The range of levels accessible by the
+ * sampler engine is [SurfaceMinLOD, SurfaceMinLOD + MIPCountLOD].
+ */
+ surface_state.SurfaceMinLOD = range->baseMipLevel;
+ surface_state.MIPCountLOD = range->levelCount - 1;
- if (cmd_buffer) {
- view->surface_state =
- anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64);
- } else {
- view->surface_state =
- anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
+ GENX(RENDER_SURFACE_STATE_pack)(NULL, iview->nonrt_surface_state.map,
+ &surface_state);
}
- struct GEN8_RENDER_SURFACE_STATE surface_state = {
- .SurfaceType = SURFTYPE_2D,
- .SurfaceArray = image->array_size > 1,
- .SurfaceFormat = format_info->surface_format,
- .SurfaceVerticalAlignment = anv_valign[surface->v_align],
- .SurfaceHorizontalAlignment = anv_halign[surface->h_align],
- .TileMode = surface->tile_mode,
- .VerticalLineStride = 0,
- .VerticalLineStrideOffset = 0,
- .SamplerL2BypassModeDisable = true,
- .RenderCacheReadWriteMode = WriteOnlyCache,
- .MemoryObjectControlState = GEN8_MOCS,
-
- /* The driver sets BaseMipLevel in SAMPLER_STATE, not here in
- * RENDER_SURFACE_STATE. The Broadwell PRM says "it is illegal to have
- * both Base Mip Level fields nonzero".
- */
- .BaseMipLevel = 0.0,
-
- .SurfaceQPitch = surface->qpitch >> 2,
- .Height = image->extent.height - 1,
- .Width = image->extent.width - 1,
- .Depth = depth - 1,
- .SurfacePitch = surface->stride - 1,
- .MinimumArrayElement = pCreateInfo->baseArraySlice,
- .NumberofMultisamples = MULTISAMPLECOUNT_1,
- .XOffset = 0,
- .YOffset = 0,
+ if (image->needs_color_rt_surface_state) {
+ iview->color_rt_surface_state =
+ alloc_surface_state(device, cmd_buffer);
- /* For render target surfaces, the hardware interprets field MIPCount/LOD as
- * LOD. The Broadwell PRM says:
+ /* For render target surfaces, the hardware interprets field
+ * MIPCount/LOD as LOD. The Broadwell PRM says:
*
* MIPCountLOD defines the LOD that will be rendered into.
* SurfaceMinLOD is ignored.
*/
- .SurfaceMinLOD = 0,
- .MIPCountLOD = pCreateInfo->mipLevel,
-
- .AuxiliarySurfaceMode = AUX_NONE,
- .RedClearColor = 0,
- .GreenClearColor = 0,
- .BlueClearColor = 0,
- .AlphaClearColor = 0,
- .ShaderChannelSelectRed = SCS_RED,
- .ShaderChannelSelectGreen = SCS_GREEN,
- .ShaderChannelSelectBlue = SCS_BLUE,
- .ShaderChannelSelectAlpha = SCS_ALPHA,
- .ResourceMinLOD = 0.0,
- .SurfaceBaseAddress = { NULL, view->offset },
- };
+ surface_state.MIPCountLOD = range->baseMipLevel;
+ surface_state.SurfaceMinLOD = 0;
- GEN8_RENDER_SURFACE_STATE_pack(NULL, view->surface_state.map, &surface_state);
+ GENX(RENDER_SURFACE_STATE_pack)(NULL, iview->color_rt_surface_state.map,
+ &surface_state);
+ }
}
-VkResult gen8_CreateSampler(
+VkResult genX(CreateSampler)(
VkDevice _device,
const VkSamplerCreateInfo* pCreateInfo,
VkSampler* pSampler)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
static const uint32_t vk_to_gen_tex_filter[] = {
- [VK_TEX_FILTER_NEAREST] = MAPFILTER_NEAREST,
- [VK_TEX_FILTER_LINEAR] = MAPFILTER_LINEAR
+ [VK_FILTER_NEAREST] = MAPFILTER_NEAREST,
+ [VK_FILTER_LINEAR] = MAPFILTER_LINEAR
};
static const uint32_t vk_to_gen_mipmap_mode[] = {
- [VK_TEX_MIPMAP_MODE_BASE] = MIPFILTER_NONE,
- [VK_TEX_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
- [VK_TEX_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
+ [VK_SAMPLER_MIPMAP_MODE_BASE] = MIPFILTER_NONE,
+ [VK_SAMPLER_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
+ [VK_SAMPLER_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
};
static const uint32_t vk_to_gen_tex_address[] = {
- [VK_TEX_ADDRESS_WRAP] = TCM_WRAP,
- [VK_TEX_ADDRESS_MIRROR] = TCM_MIRROR,
- [VK_TEX_ADDRESS_CLAMP] = TCM_CLAMP,
- [VK_TEX_ADDRESS_MIRROR_ONCE] = TCM_MIRROR_ONCE,
- [VK_TEX_ADDRESS_CLAMP_BORDER] = TCM_CLAMP_BORDER,
+ [VK_SAMPLER_ADDRESS_MODE_REPEAT] = TCM_WRAP,
+ [VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT] = TCM_MIRROR,
+ [VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE] = TCM_CLAMP,
+ [VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE] = TCM_MIRROR_ONCE,
+ [VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER] = TCM_CLAMP_BORDER,
};
static const uint32_t vk_to_gen_compare_op[] = {
[VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
[VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
[VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
- [VK_COMPARE_OP_LESS_EQUAL] = PREFILTEROPLEQUAL,
+ [VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLEQUAL,
[VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER,
[VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
- [VK_COMPARE_OP_GREATER_EQUAL] = PREFILTEROPGEQUAL,
+ [VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGEQUAL,
[VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
};
max_anisotropy = RATIO21;
}
- struct GEN8_SAMPLER_STATE sampler_state = {
+ struct GENX(SAMPLER_STATE) sampler_state = {
.SamplerDisable = false,
.TextureBorderColorMode = DX10OGL,
.LODPreClampMode = 0,
+#if ANV_GEN == 8
.BaseMipLevel = 0.0,
- .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipMode],
+#endif
+ .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipmapMode],
.MagModeFilter = mag_filter,
.MinModeFilter = min_filter,
- .TextureLODBias = pCreateInfo->mipLodBias * 256,
+ .TextureLODBias = anv_clamp_f(pCreateInfo->mipLodBias, -16, 15.996),
.AnisotropicAlgorithm = EWAApproximation,
- .MinLOD = pCreateInfo->minLod,
- .MaxLOD = pCreateInfo->maxLod,
+ .MinLOD = anv_clamp_f(pCreateInfo->minLod, 0, 14),
+ .MaxLOD = anv_clamp_f(pCreateInfo->maxLod, 0, 14),
.ChromaKeyEnable = 0,
.ChromaKeyIndex = 0,
.ChromaKeyMode = 0,
.UAddressMinFilterRoundingEnable = 0,
.UAddressMagFilterRoundingEnable = 0,
.TrilinearFilterQuality = 0,
- .NonnormalizedCoordinateEnable = 0,
- .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressU],
- .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressV],
- .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressW],
+ .NonnormalizedCoordinateEnable = pCreateInfo->unnormalizedCoordinates,
+ .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeU],
+ .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeV],
+ .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeW],
};
- GEN8_SAMPLER_STATE_pack(NULL, sampler->state, &sampler_state);
+ GENX(SAMPLER_STATE_pack)(NULL, sampler->state, &sampler_state);
*pSampler = anv_sampler_to_handle(sampler);
return VK_SUCCESS;
}
-
-VkResult gen8_CreateDynamicDepthStencilState(
- VkDevice _device,
- const VkDynamicDepthStencilStateCreateInfo* pCreateInfo,
- VkDynamicDepthStencilState* pState)
-{
- ANV_FROM_HANDLE(anv_device, device, _device);
- struct anv_dynamic_ds_state *state;
-
- assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_DEPTH_STENCIL_STATE_CREATE_INFO);
-
- state = anv_device_alloc(device, sizeof(*state), 8,
- VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
- if (state == NULL)
- return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
-
- struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
- GEN8_3DSTATE_WM_DEPTH_STENCIL_header,
-
- /* Is this what we need to do? */
- .StencilBufferWriteEnable = pCreateInfo->stencilWriteMask != 0,
-
- .StencilTestMask = pCreateInfo->stencilReadMask & 0xff,
- .StencilWriteMask = pCreateInfo->stencilWriteMask & 0xff,
-
- .BackfaceStencilTestMask = pCreateInfo->stencilReadMask & 0xff,
- .BackfaceStencilWriteMask = pCreateInfo->stencilWriteMask & 0xff,
- };
-
- GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, state->state_wm_depth_stencil,
- &wm_depth_stencil);
-
- struct GEN8_COLOR_CALC_STATE color_calc_state = {
- .StencilReferenceValue = pCreateInfo->stencilFrontRef,
- .BackFaceStencilReferenceValue = pCreateInfo->stencilBackRef
- };
-
- GEN8_COLOR_CALC_STATE_pack(NULL, state->state_color_calc, &color_calc_state);
-
- *pState = anv_dynamic_ds_state_to_handle(state);
-
- return VK_SUCCESS;
-}