anv: Add initial support for cube maps
[mesa.git] / src / vulkan / gen8_state.c
index 901cc3b25a8076d6ff76788fb1d68b27d0a20fd9..aa57073c3e842f756bb55bea33c5b6df19da5621 100644 (file)
 #include "gen8_pack.h"
 #include "gen9_pack.h"
 
+static const uint8_t
+anv_surftype(const struct anv_image *image, VkImageViewType view_type)
+{
+   switch (view_type) {
+   default:
+      unreachable("bad VkImageViewType");
+   case VK_IMAGE_VIEW_TYPE_1D:
+   case VK_IMAGE_VIEW_TYPE_1D_ARRAY:
+      assert(image->type == VK_IMAGE_TYPE_1D);
+      return SURFTYPE_1D;
+   case VK_IMAGE_VIEW_TYPE_CUBE:
+   case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY:
+      assert(image->type == VK_IMAGE_TYPE_2D);
+      return SURFTYPE_CUBE;
+   case VK_IMAGE_VIEW_TYPE_2D:
+   case VK_IMAGE_VIEW_TYPE_2D_ARRAY:
+      assert(image->type == VK_IMAGE_TYPE_2D);
+      return SURFTYPE_2D;
+   case VK_IMAGE_VIEW_TYPE_3D:
+      assert(image->type == VK_IMAGE_TYPE_3D);
+      return SURFTYPE_3D;
+   }
+}
+
 void
 genX(fill_buffer_surface_state)(void *state, const struct anv_format *format,
                                 uint32_t offset, uint32_t range, uint32_t stride)
@@ -120,9 +144,11 @@ get_halign_valign(const struct isl_surf *surf, uint32_t *halign, uint32_t *valig
        * format (ETC2 has a block height of 4), then the vertical alignment is
        * 4 compression blocks or, equivalently, 16 pixels.
        */
-      struct isl_extent3d lod_align_el = isl_surf_get_lod_alignment_el(surf);
-      *halign = anv_halign[lod_align_el.width];
-      *valign = anv_valign[lod_align_el.height];
+      struct isl_extent3d image_align_el
+         = isl_surf_get_image_alignment_el(surf);
+
+      *halign = anv_halign[image_align_el.width];
+      *valign = anv_valign[image_align_el.height];
    #else
       /* Pre-Skylake, RENDER_SUFFACE_STATE.SurfaceVerticalAlignment is in
        * units of surface samples.  For example, if SurfaceVerticalAlignment
@@ -130,9 +156,11 @@ get_halign_valign(const struct isl_surf *surf, uint32_t *halign, uint32_t *valig
        * format (compressed or not) the vertical alignment is
        * 4 pixels.
        */
-      struct isl_extent3d lod_align_sa = isl_surf_get_lod_alignment_sa(surf);
-      *halign = anv_halign[lod_align_sa.width];
-      *valign = anv_valign[lod_align_sa.height];
+      struct isl_extent3d image_align_sa
+         = isl_surf_get_image_alignment_sa(surf);
+
+      *halign = anv_halign[image_align_sa.width];
+      *valign = anv_valign[image_align_sa.height];
    #endif
 }
 
@@ -218,7 +246,7 @@ genX(image_view_init)(struct anv_image_view *iview,
    get_halign_valign(&surface->isl, &halign, &valign);
 
    struct GENX(RENDER_SURFACE_STATE) surface_state = {
-      .SurfaceType = image->surface_type,
+      .SurfaceType = anv_surftype(image, pCreateInfo->viewType),
       .SurfaceArray = image->array_size > 1,
       .SurfaceFormat = format_info->surface_format,
       .SurfaceVerticalAlignment = valign,
@@ -302,6 +330,21 @@ genX(image_view_init)(struct anv_image_view *iview,
       if (!device->info.has_llc)
          anv_state_clflush(iview->color_rt_surface_state);
    }
+
+   if (image->needs_storage_surface_state) {
+      iview->storage_surface_state =
+         alloc_surface_state(device, cmd_buffer);
+
+      surface_state.SurfaceFormat =
+         isl_lower_storage_image_format(&device->isl_dev,
+                                        format_info->surface_format);
+
+      surface_state.SurfaceMinLOD = range->baseMipLevel;
+      surface_state.MIPCountLOD = range->levelCount - 1;
+
+      GENX(RENDER_SURFACE_STATE_pack)(NULL, iview->storage_surface_state.map,
+                                      &surface_state);
+   }
 }
 
 VkResult genX(CreateSampler)(