* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
+// > c60k28 (Viacheslav, VT) [at] yandex [dot] com
+// > Achronix eFPGA technology sim models. User must first simulate the generated \
+// > netlist before going to test it on board/custom chip.
+// > Changelog: 1) Removed unused VCC/GND modules
+// > 2) Altera comments here (?). Removed.
+// > 3) Reusing LUT sim model, removed wrong wires and parameters.
-module VCC (output V);
- assign V = 1'b1;
-endmodule // VCC
-
-module GND (output G);
- assign G = 1'b0;
-endmodule // GND
-
-/* Altera MAX10 devices Input Buffer Primitive */
module PADIN (output padout, input padin);
assign padout = padin;
-endmodule // fiftyfivenm_io_ibuf
+endmodule
-/* Altera MAX10 devices Output Buffer Primitive */
module PADOUT (output padout, input padin, input oe);
assign padout = padin;
assign oe = oe;
-endmodule // fiftyfivenm_io_obuf
+endmodule
-/* Altera MAX10 4-input non-fracturable LUT Primitive */
module LUT4 (output dout,
input din0, din1, din2, din3);
-/* Internal parameters which define the behaviour
- of the LUT primitive.
- lut_mask define the lut function, can be expressed in 16-digit bin or hex.
- sum_lutc_input define the type of LUT (combinational | arithmetic).
- dont_touch for retiming || carry options.
- lpm_type for WYSIWYG */
-
-parameter lut_function = 16'hFFFF;
-//parameter dont_touch = "off";
-//parameter lpm_type = "fiftyfivenm_lcell_comb";
-//parameter sum_lutc_input = "datac";
-
-reg [1:0] lut_type;
-reg cout_rt;
+parameter [15:0] lut_function = 16'hFFFF;
reg combout_rt;
wire dataa_w;
wire datab_w;
wire datac_w;
wire datad_w;
-wire cin_w;
assign dataa_w = din0;
assign datab_w = din1;
s1 = datab ? s2[3:2] : s2[1:0];
lut_data = dataa ? s1[1] : s1[0];
end
-
endfunction
-initial begin
- /*if (sum_lutc_input == "datac")*/ lut_type = 0;
- /*else
- if (sum_lutc_input == "cin") lut_type = 1;
- else begin
- $error("Error in sum_lutc_input. Parameter %s is not a valid value.\n", sum_lutc_input);
- $finish();
- end*/
+always @(dataa_w or datab_w or datac_w or datad_w) begin
+ combout_rt = lut_data(lut_function, dataa_w, datab_w,
+ datac_w, datad_w);
end
-
-always @(dataa_w or datab_w or datac_w or datad_w or cin_w) begin
- if (lut_type == 0) begin // logic function
- combout_rt = lut_data(lut_function, dataa_w, datab_w,
- datac_w, datad_w);
- end
- else if (lut_type == 1) begin // arithmetic function
- combout_rt = lut_data(lut_function, dataa_w, datab_w,
- cin_w, datad_w);
- end
- cout_rt = lut_data(lut_function, dataa_w, datab_w, cin_w, 'b0);
-end
-
assign dout = combout_rt & 1'b1;
-//assign cout = cout_rt & 1'b1;
-
-endmodule // fiftyfivenm_lcell_comb
-
-/* Altera MAX10 D Flip-Flop Primitive */
-// TODO: Implement advanced simulation functions
-module dffeas ( output q,
- input d, clk, clrn, prn, ena,
- input asdata, aload, sclr, sload );
-
-parameter power_up="dontcare";
-parameter is_wysiwyg="false";
- reg q;
+endmodule
- always @(posedge clk)
- q <= d;
+module DFF (output q,
+ input d, ck);
+ reg q;
+ always @(posedge ck)
+ q <= d;
endmodule