parameter B_WIDTH = 1;\r
parameter Y_WIDTH = 1;\r
\r
+ (* force_downto *)\r
input [A_WIDTH-1:0] A;\r
+ (* force_downto *)\r
input [B_WIDTH-1:0] B;\r
+ (* force_downto *)\r
output [Y_WIDTH-1:0] Y;\r
\r
parameter _TECHMAP_CELLTYPE_ = "";\r
else if (Y_WIDTH < `DSP_Y_MINWIDTH)\r
wire _TECHMAP_FAIL_ = 1;\r
`endif\r
- else if (_TECHMAP_CELLTYPE_ == "$mul" && A_SIGNED != B_SIGNED)\r
- wire _TECHMAP_FAIL_ = 1;\r
`ifdef DSP_SIGNEDONLY\r
- else if (_TECHMAP_CELLTYPE_ == "$mul" && !A_SIGNED)\r
+ else if (_TECHMAP_CELLTYPE_ == "$mul" && !A_SIGNED && !B_SIGNED)\r
\$mul #(\r
.A_SIGNED(1),\r
.B_SIGNED(1),\r
localparam partial_Y_WIDTH = `MIN(Y_WIDTH, B_WIDTH+`DSP_A_MAXWIDTH_PARTIAL);\r
localparam last_A_WIDTH = A_WIDTH-n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom);\r
localparam last_Y_WIDTH = B_WIDTH+last_A_WIDTH;\r
- if (A_SIGNED && B_SIGNED) begin\r
+ if (A_SIGNED && B_SIGNED) begin : blk\r
+ (* force_downto *)\r
wire signed [partial_Y_WIDTH-1:0] partial [n-1:0];\r
+ (* force_downto *)\r
wire signed [last_Y_WIDTH-1:0] last_partial;\r
+ (* force_downto *)\r
wire signed [Y_WIDTH-1:0] partial_sum [n:0];\r
end\r
- else begin\r
+ else begin : blk\r
+ (* force_downto *)\r
wire [partial_Y_WIDTH-1:0] partial [n-1:0];\r
+ (* force_downto *)\r
wire [last_Y_WIDTH-1:0] last_partial;\r
+ (* force_downto *)\r
wire [Y_WIDTH-1:0] partial_sum [n:0];\r
end\r
\r
- for (i = 0; i < n; i=i+1) begin:slice\r
+ for (i = 0; i < n; i=i+1) begin:sliceA\r
\$__mul #(\r
.A_SIGNED(sign_headroom),\r
.B_SIGNED(B_SIGNED),\r
.A_WIDTH(`DSP_A_MAXWIDTH_PARTIAL),\r
.B_WIDTH(B_WIDTH),\r
.Y_WIDTH(partial_Y_WIDTH)\r
- ) mul_slice (\r
+ ) mul (\r
.A({{sign_headroom{1'b0}}, A[i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom) +: `DSP_A_MAXWIDTH_PARTIAL-sign_headroom]}),\r
.B(B),\r
- .Y(partial[i])\r
+ .Y(blk.partial[i])\r
);\r
// TODO: Currently a 'cascade' approach to summing the partial\r
// products is taken here, but a more efficient 'binary\r
// reduction' approach also exists...\r
if (i == 0)\r
- assign partial_sum[i] = partial[i];\r
- else begin\r
- // Rewrite the following statement explicitly in order\r
- // to save on a call to 'opt_expr -fine' which would\r
- // optimise away the '<<' op and trim size of adder\r
- //assign partial_sum[i] = (partial[i] << i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[i-1];\r
- if (A_SIGNED && B_SIGNED)\r
- assign partial_sum[i][Y_WIDTH-1:i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)] = partial[i] + $signed(partial_sum[i-1][Y_WIDTH-1:i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)]);\r
- else\r
- assign partial_sum[i][Y_WIDTH-1:i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)] = partial[i] + partial_sum[i-1][Y_WIDTH-1:i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)];\r
- assign partial_sum[i][i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)-1:0] = partial_sum[i-1][i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)-1:0];\r
- end\r
+ assign blk.partial_sum[i] = blk.partial[i];\r
+ else\r
+ assign blk.partial_sum[i] = (blk.partial[i] << (* mul2dsp *) i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)) + (* mul2dsp *) blk.partial_sum[i-1];\r
end\r
\r
\$__mul #(\r
.A_WIDTH(last_A_WIDTH),\r
.B_WIDTH(B_WIDTH),\r
.Y_WIDTH(last_Y_WIDTH)\r
- ) mul_slice_last (\r
+ ) sliceA.last (\r
.A(A[A_WIDTH-1 -: last_A_WIDTH]),\r
.B(B),\r
- .Y(last_partial)\r
+ .Y(blk.last_partial)\r
);\r
- //assign partial_sum[n] = (last_partial << n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[n-1];\r
- if (A_SIGNED && B_SIGNED)\r
- assign partial_sum[n][Y_WIDTH-1:n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)] = last_partial + $signed(partial_sum[n-1][Y_WIDTH-1:n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)]);\r
- else\r
- assign partial_sum[n][Y_WIDTH-1:n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)] = last_partial + partial_sum[n-1][Y_WIDTH-1:n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)];\r
- assign partial_sum[n][n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)-1:0] = partial_sum[n-1][n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)-1:0];\r
- assign Y = partial_sum[n];\r
+ assign blk.partial_sum[n] = (blk.last_partial << (* mul2dsp *) n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)) + (* mul2dsp *) blk.partial_sum[n-1];\r
+ assign Y = blk.partial_sum[n];\r
end\r
else if (B_WIDTH > `DSP_B_MAXWIDTH) begin\r
localparam n = (B_WIDTH-`DSP_B_MAXWIDTH+`DSP_B_MAXWIDTH_PARTIAL-sign_headroom-1) / (`DSP_B_MAXWIDTH_PARTIAL-sign_headroom);\r
localparam partial_Y_WIDTH = `MIN(Y_WIDTH, A_WIDTH+`DSP_B_MAXWIDTH_PARTIAL);\r
localparam last_B_WIDTH = B_WIDTH-n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom);\r
localparam last_Y_WIDTH = A_WIDTH+last_B_WIDTH;\r
- if (A_SIGNED && B_SIGNED) begin\r
+ if (A_SIGNED && B_SIGNED) begin : blk\r
+ (* force_downto *)\r
wire signed [partial_Y_WIDTH-1:0] partial [n-1:0];\r
+ (* force_downto *)\r
wire signed [last_Y_WIDTH-1:0] last_partial;\r
+ (* force_downto *)\r
wire signed [Y_WIDTH-1:0] partial_sum [n:0];\r
end\r
- else begin\r
+ else begin : blk\r
+ (* force_downto *)\r
wire [partial_Y_WIDTH-1:0] partial [n-1:0];\r
+ (* force_downto *)\r
wire [last_Y_WIDTH-1:0] last_partial;\r
+ (* force_downto *)\r
wire [Y_WIDTH-1:0] partial_sum [n:0];\r
end\r
\r
- for (i = 0; i < n; i=i+1) begin:slice\r
+ for (i = 0; i < n; i=i+1) begin:sliceB\r
\$__mul #(\r
.A_SIGNED(A_SIGNED),\r
.B_SIGNED(sign_headroom),\r
) mul (\r
.A(A),\r
.B({{sign_headroom{1'b0}}, B[i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom) +: `DSP_B_MAXWIDTH_PARTIAL-sign_headroom]}),\r
- .Y(partial[i])\r
+ .Y(blk.partial[i])\r
);\r
// TODO: Currently a 'cascade' approach to summing the partial\r
// products is taken here, but a more efficient 'binary\r
// reduction' approach also exists...\r
if (i == 0)\r
- assign partial_sum[i] = partial[i];\r
- else begin\r
- // Rewrite the following statement explicitly in order\r
- // to save on a call to 'opt_expr -fine' which would\r
- // optimise away the '<<' op and trim size of adder\r
- //assign partial_sum[i] = (partial[i] << i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[i-1];\r
- if (A_SIGNED && B_SIGNED)\r
- assign partial_sum[i][Y_WIDTH-1:i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)] = partial[i] + $signed(partial_sum[i-1][Y_WIDTH-1:i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)]);\r
- else\r
- assign partial_sum[i][Y_WIDTH-1:i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)] = partial[i] + partial_sum[i-1][Y_WIDTH-1:i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)];\r
- assign partial_sum[i][i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)-1:0] = partial_sum[i-1][i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)-1:0];\r
- end\r
+ assign blk.partial_sum[i] = blk.partial[i];\r
+ else\r
+ assign blk.partial_sum[i] = (blk.partial[i] << (* mul2dsp *) i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)) + (* mul2dsp *) blk.partial_sum[i-1];\r
end\r
\r
\$__mul #(\r
.A_WIDTH(A_WIDTH),\r
.B_WIDTH(last_B_WIDTH),\r
.Y_WIDTH(last_Y_WIDTH)\r
- ) mul_last (\r
+ ) mul_sliceB_last (\r
.A(A),\r
.B(B[B_WIDTH-1 -: last_B_WIDTH]),\r
- .Y(last_partial)\r
+ .Y(blk.last_partial)\r
);\r
- //assign partial_sum[n] = (last_partial << n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[n-1];\r
- if (A_SIGNED && B_SIGNED)\r
- assign partial_sum[n][Y_WIDTH-1:n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)] = last_partial + partial_sum[n-1][Y_WIDTH-1:n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)];\r
- else\r
- assign partial_sum[n][Y_WIDTH-1:n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)] = last_partial + $signed(partial_sum[n-1][Y_WIDTH-1:n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)]);\r
- assign partial_sum[n][n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)-1:0] = partial_sum[n-1][n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)-1:0];\r
- assign Y = partial_sum[n];\r
+ assign blk.partial_sum[n] = (blk.last_partial << (* mul2dsp *) n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)) + (* mul2dsp *) blk.partial_sum[n-1];\r
+ assign Y = blk.partial_sum[n];\r
end\r
else begin\r
- if (A_SIGNED)\r
+ if (A_SIGNED) begin : blkA\r
wire signed [`DSP_A_MAXWIDTH-1:0] Aext = $signed(A);\r
- else\r
+ end\r
+ else begin : blkA\r
wire [`DSP_A_MAXWIDTH-1:0] Aext = A;\r
- if (B_SIGNED)\r
+ end\r
+ if (B_SIGNED) begin : blkB\r
wire signed [`DSP_B_MAXWIDTH-1:0] Bext = $signed(B);\r
- else\r
+ end\r
+ else begin : blkB\r
wire [`DSP_B_MAXWIDTH-1:0] Bext = B;\r
+ end\r
\r
`DSP_NAME #(\r
.A_SIGNED(A_SIGNED),\r
.B_WIDTH(`DSP_B_MAXWIDTH),\r
.Y_WIDTH(`MIN(Y_WIDTH,`DSP_A_MAXWIDTH+`DSP_B_MAXWIDTH)),\r
) _TECHMAP_REPLACE_ (\r
- .A(Aext),\r
- .B(Bext),\r
+ .A(blkA.Aext),\r
+ .B(blkB.Bext),\r
.Y(Y)\r
);\r
end\r
parameter B_WIDTH = 1;\r
parameter Y_WIDTH = 1;\r
\r
+ (* force_downto *)\r
input [A_WIDTH-1:0] A;\r
+ (* force_downto *)\r
input [B_WIDTH-1:0] B;\r
+ (* force_downto *)\r
output [Y_WIDTH-1:0] Y;\r
\r
// Indirection necessary since mapping\r
projects / yosys.git / blobdiff