Merge pull request #412 from azonenberg/reduce-fixes
[yosys.git] / techlibs / greenpak4 / synth_greenpak4.cc
index 10db06cd130b4bd148b4dec0a281aad4dbda7bbe..5e0e9e5d54761e2ca6dc14e891ac99454c85eb08 100644 (file)
@@ -36,6 +36,8 @@ struct SynthGreenPAK4Pass : public ScriptPass
                log("    synth_greenpak4 [options]\n");
                log("\n");
                log("This command runs synthesis for GreenPAK4 FPGAs. This work is experimental.\n");
+               log("It is intended to be used with https://github.com/azonenberg/openfpga as the\n");
+               log("place-and-route.\n");
                log("\n");
                log("    -top <module>\n");
                log("        use the specified module as top module (default='top')\n");
@@ -153,12 +155,13 @@ struct SynthGreenPAK4Pass : public ScriptPass
 
                if (check_label("fine"))
                {
-                       run("greenpak4_counters");
+                       run("extract_counter -pout GP_DCMP,GP_DAC -maxwidth 14");
                        run("clean");
                        run("opt -fast -mux_undef -undriven -fine");
                        run("memory_map");
                        run("opt -undriven -fine");
                        run("techmap");
+                       run("techmap -map +/greenpak4/cells_latch.v");
                        run("dfflibmap -prepare -liberty +/greenpak4/gp_dff.lib");
                        run("opt -fast");
                        if (retime || help_mode)
@@ -167,20 +170,25 @@ struct SynthGreenPAK4Pass : public ScriptPass
 
                if (check_label("map_luts"))
                {
-                       if (help_mode || part == "SLG46140V") run("nlutmap -luts 0,6,8,2", " (for -part SLG46140V)");
-                       if (help_mode || part == "SLG46620V") run("nlutmap -luts 2,8,16,2", "(for -part SLG46620V)");
-                       if (help_mode || part == "SLG46621V") run("nlutmap -luts 2,8,16,2", "(for -part SLG46621V)");
+                       if (help_mode || part == "SLG46140V") run("nlutmap -assert -luts 0,6,8,2", " (for -part SLG46140V)");
+                       if (help_mode || part == "SLG46620V") run("nlutmap -assert -luts 2,8,16,2", "(for -part SLG46620V)");
+                       if (help_mode || part == "SLG46621V") run("nlutmap -assert -luts 2,8,16,2", "(for -part SLG46621V)");
                        run("clean");
                }
 
                if (check_label("map_cells"))
                {
+                       run("shregmap -tech greenpak4");
                        run("dfflibmap -liberty +/greenpak4/gp_dff.lib");
-                       run("techmap -map +/greenpak4/cells_map.v");
                        run("dffinit -ff GP_DFF Q INIT");
                        run("dffinit -ff GP_DFFR Q INIT");
                        run("dffinit -ff GP_DFFS Q INIT");
                        run("dffinit -ff GP_DFFSR Q INIT");
+                       run("iopadmap -bits -inpad GP_IBUF OUT:IN -outpad GP_OBUF IN:OUT -inoutpad GP_OBUF OUT:IN -toutpad GP_OBUFT OE:IN:OUT -tinoutpad GP_IOBUF OE:OUT:IN:IO");
+                       run("attrmvcp -attr src -attr LOC t:GP_OBUF t:GP_OBUFT t:GP_IOBUF n:*");
+                       run("attrmvcp -attr src -attr LOC -driven t:GP_IBUF n:*");
+                       run("techmap -map +/greenpak4/cells_map.v");
+                       run("greenpak4_dffinv");
                        run("clean");
                }
 
@@ -193,12 +201,9 @@ struct SynthGreenPAK4Pass : public ScriptPass
 
                if (check_label("json"))
                {
-                       run("splitnets", "(temporary workaround for gp4par parser limitation)");
                        if (!json_file.empty() || help_mode)
                                run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
                }
-
-               log_pop();
        }
 } SynthGreenPAK4Pass;