Merge pull request #3127 from whitequark/cxxrtl-no-reset-elided

[yosys.git] / techlibs / ice40 / ice40_braminit.cc

diff --git a/techlibs/ice40/ice40_braminit.cc b/techlibs/ice40/ice40_braminit.cc
index 4fa6b0792ed11bee3f99f1e98a8b455576522cd0..955860740273560435d440cf5c0bea1632b045ea 100644 (file)
--- a/techlibs/ice40/ice40_braminit.cc
+++ b/techlibs/ice40/ice40_braminit.cc
@@ -1,7 +1,7 @@
 /*
  *  yosys -- Yosys Open SYnthesis Suite
  *
- *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2012  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above
@@ -33,15 +33,15 @@ static void run_ice40_braminit(Module *module)
                uint16_t mem[256];
 
                /* Only consider cells we're interested in */
-               if (cell->type != "\\SB_RAM40_4K" &&
-                   cell->type != "\\SB_RAM40_4KNR" &&
-                   cell->type != "\\SB_RAM40_4KNW" &&
-                   cell->type != "\\SB_RAM40_4KNRNW")
+               if (cell->type != ID(SB_RAM40_4K) &&
+                   cell->type != ID(SB_RAM40_4KNR) &&
+                   cell->type != ID(SB_RAM40_4KNW) &&
+                   cell->type != ID(SB_RAM40_4KNRNW))
                        continue;
-               if (!cell->hasParam("\\INIT_FILE"))
+               if (!cell->hasParam(ID(INIT_FILE)))
                        continue;
-               std::string init_file = cell->getParam("\\INIT_FILE").decode_string();
-               cell->unsetParam("\\INIT_FILE");
+               std::string init_file = cell->getParam(ID(INIT_FILE)).decode_string();
+               cell->unsetParam(ID(INIT_FILE));
                if (init_file == "")
                        continue;
 
@@ -69,13 +69,13 @@ static void run_ice40_braminit(Module *module)
 
                        for (int i = 0; i < GetSize(line); i++)
                        {
-                               if (in_comment && line.substr(i, 2) == "*/") {
+                               if (in_comment && line.compare(i, 2, "*/") == 0) {
                                        line[i] = ' ';
                                        line[i+1] = ' ';
                                        in_comment = false;
                                        continue;
                                }
-                               if (!in_comment && line.substr(i, 2) == "/*")
+                               if (!in_comment && line.compare(i, 2, "/*") == 0)
                                        in_comment = true;
                                if (in_comment)
                                        line[i] = ' ';
@@ -87,7 +87,7 @@ static void run_ice40_braminit(Module *module)
                                long value;
 
                                token = next_token(line, " \t\r\n");
-                               if (token.empty() || token.substr(0, 2) == "//")
+                               if (token.empty() || token.compare(0, 2, "//") == 0)
                                        break;
 
                                if (token[0] == '@') {
@@ -128,7 +128,7 @@ static void run_ice40_braminit(Module *module)
 
 struct Ice40BRAMInitPass : public Pass {
        Ice40BRAMInitPass() : Pass("ice40_braminit", "iCE40: perform SB_RAM40_4K initialization from file") { }
-       void help() YS_OVERRIDE
+       void help() override
        {
                //   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
                log("\n");
@@ -138,7 +138,7 @@ struct Ice40BRAMInitPass : public Pass {
                log("parameter and converts it into the required INIT_x attributes\n");
                log("\n");
        }
-       void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
+       void execute(std::vector<std::string> args, RTLIL::Design *design) override
        {
                log_header(design, "Executing ICE40_BRAMINIT pass.\n");