Run "peepopt" in generic "synth" pass and "synth_ice40"

[yosys.git] / techlibs / ice40 / synth_ice40.cc

diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index cc4627cd35ae32b581b17ecfaf832e97f9e50906..f5249e567980e9136b26341217850aeae299cb34 100644 (file)
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -79,6 +79,12 @@ struct SynthIce40Pass : public ScriptPass
                log("    -nobram\n");
                log("        do not use SB_RAM40_4K* cells in output netlist\n");
                log("\n");
+               log("    -dsp\n");
+               log("        use iCE40 UltraPlus DSP cells for large arithmetic\n");
+               log("\n");
+               log("    -noabc\n");
+               log("        use built-in Yosys LUT techmapping instead of abc\n");
+               log("\n");
                log("    -abc2\n");
                log("        run two passes of 'abc' for slightly improved logic density\n");
                log("\n");
@@ -93,7 +99,7 @@ struct SynthIce40Pass : public ScriptPass
        }
 
        string top_opt, blif_file, edif_file, json_file;
-       bool nocarry, nodffe, nobram, flatten, retime, relut, abc2, vpr;
+       bool nocarry, nodffe, nobram, dsp, flatten, retime, relut, noabc, abc2, vpr;
        int min_ce_use;
 
        void clear_flags() YS_OVERRIDE
@@ -106,9 +112,11 @@ struct SynthIce40Pass : public ScriptPass
                nodffe = false;
                min_ce_use = -1;
                nobram = false;
+               dsp = false;
                flatten = true;
                retime = false;
                relut = false;
+               noabc = false;
                abc2 = false;
                vpr = false;
        }
@@ -177,6 +185,14 @@ struct SynthIce40Pass : public ScriptPass
                                nobram = true;
                                continue;
                        }
+                       if (args[argidx] == "-dsp") {
+                               dsp = true;
+                               continue;
+                       }
+                       if (args[argidx] == "-noabc") {
+                               noabc = true;
+                               continue;
+                       }
                        if (args[argidx] == "-abc2") {
                                abc2 = true;
                                continue;
@@ -190,7 +206,7 @@ struct SynthIce40Pass : public ScriptPass
                extra_args(args, argidx, design);
 
                if (!design->full_selection())
-                       log_cmd_error("This comannd only operates on fully selected designs!\n");
+                       log_cmd_error("This command only operates on fully selected designs!\n");
 
                log_header(design, "Executing SYNTH_ICE40 pass.\n");
                log_push();
@@ -206,11 +222,11 @@ struct SynthIce40Pass : public ScriptPass
                {
                        run("read_verilog -lib +/ice40/cells_sim.v");
                        run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
+                       run("proc");
                }
 
                if (flatten && check_label("flatten", "(unless -noflatten)"))
                {
-                       run("proc");
                        run("flatten");
                        run("tribuf -logic");
                        run("deminout");
@@ -218,20 +234,43 @@ struct SynthIce40Pass : public ScriptPass
 
                if (check_label("coarse"))
                {
-                       run("synth -run coarse");
+                       run("opt_expr");
+                       run("opt_clean");
+                       run("check");
+                       run("opt");
+                       run("wreduce");
+                       run("peepopt");
+                       run("opt_clean");
+                       run("share");
+                       run("techmap -map +/cmp2lut.v -D LUT_WIDTH=4");
+                       run("opt_expr");
+                       run("opt_clean");
+                       if (help_mode || dsp)
+                               run("ice40_dsp", "(if -dsp)");
+                       run("alumacc");
+                       run("opt");
+                       run("fsm");
+                       run("opt -fast");
+                       run("memory -nomap");
+                       run("opt_clean");
                }
 
                if (!nobram && check_label("bram", "(skip if -nobram)"))
                {
                        run("memory_bram -rules +/ice40/brams.txt");
                        run("techmap -map +/ice40/brams_map.v");
+                       run("ice40_braminit");
                }
 
-               if (check_label("fine"))
+               if (check_label("map"))
                {
                        run("opt -fast -mux_undef -undriven -fine");
                        run("memory_map");
                        run("opt -undriven -fine");
+               }
+
+               if (check_label("map_gates"))
+               {
                        if (nocarry)
                                run("techmap");
                        else
@@ -265,7 +304,13 @@ struct SynthIce40Pass : public ScriptPass
                                run("ice40_opt", "(only if -abc2)");
                        }
                        run("techmap -map +/ice40/latches_map.v");
-                       run("abc -lut 4");
+                       if (noabc || help_mode) {
+                               run("simplemap", "                               (only if -noabc)");
+                               run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)");
+                       }
+                       if (!noabc) {
+                               run("abc -dress -lut 4", "(skip if -noabc)");
+                       }
                        run("clean");
                        if (relut || help_mode) {
                                run("ice40_unlut", "                            (only if -relut)");