machxo2: Tristate is active-low.

[yosys.git] / techlibs / machxo2 / synth_machxo2.cc

diff --git a/techlibs/machxo2/synth_machxo2.cc b/techlibs/machxo2/synth_machxo2.cc
index f126f9c32db1bc3fe792a9ea1c55f3af2c58354c..19c0ab9d00b5e79f7ed9af006e5bf1e2bb9451c4 100644 (file)
--- a/techlibs/machxo2/synth_machxo2.cc
+++ b/techlibs/machxo2/synth_machxo2.cc
@@ -60,6 +60,9 @@ struct SynthMachXO2Pass : public ScriptPass
                log("    -noflatten\n");
                log("        do not flatten design before synthesis\n");
                log("\n");
+               log("    -noiopad\n");
+               log("        do not insert IO buffers\n");
+               log("\n");
                log("    -vpr\n");
                log("        generate an output netlist (and BLIF file) suitable for VPR\n");
                log("        (this feature is experimental and incomplete)\n");
@@ -71,7 +74,7 @@ struct SynthMachXO2Pass : public ScriptPass
        }
 
        string top_opt, blif_file, edif_file, json_file;
-       bool flatten, vpr;
+       bool flatten, vpr, noiopad;
 
        void clear_flags() override
        {
@@ -81,6 +84,7 @@ struct SynthMachXO2Pass : public ScriptPass
                json_file = "";
                flatten = true;
                vpr = false;
+               noiopad = false;
        }
 
        void execute(std::vector<std::string> args, RTLIL::Design *design) override
@@ -123,6 +127,10 @@ struct SynthMachXO2Pass : public ScriptPass
                                flatten = false;
                                continue;
                        }
+                       if (args[argidx] == "-noiopad") {
+                               noiopad = true;
+                               continue;
+                       }
                        if (args[argidx] == "-vpr") {
                                vpr = true;
                                continue;
@@ -146,13 +154,13 @@ struct SynthMachXO2Pass : public ScriptPass
        {
                if (check_label("begin"))
                {
-                       run("read_verilog -lib +/machxo2/cells_sim.v");
+                       run("read_verilog -lib -icells +/machxo2/cells_sim.v");
                        run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
                }
 
                if (check_label("flatten", "(unless -noflatten)"))
                {
-                       if (flatten) {
+                       if (flatten || help_mode) {
                                run("proc");
                                run("flatten");
                                run("tribuf -logic");
@@ -173,6 +181,16 @@ struct SynthMachXO2Pass : public ScriptPass
                        run("opt -fast");
                }
 
+               if (check_label("map_ios", "(unless -noiopad)"))
+               {
+                       if (!noiopad || help_mode)
+                       {
+                               run("iopadmap -bits -outpad $__FACADE_OUTPAD I:O -inpad $__FACADE_INPAD O:I -toutpad $__FACADE_TOUTPAD OE:I:O -tinoutpad $__FACADE_TINOUTPAD OE:O:I:B A:top");
+                               run("attrmvcp -attr src -attr LOC t:$__FACADE_OUTPAD %x:+[O] t:$__FACADE_TOUTPAD %x:+[O] t:$__FACADE_TINOUTPAD %x:+[B]");
+                               run("attrmvcp -attr src -attr LOC -driven t:$__FACADE_INPAD %x:+[I]");
+                       }
+               }
+
                if (check_label("map_ffs"))
                {
                        run("dfflegalize -cell $_DFF_P_ 0");