Merge remote-tracking branch 'origin/master' into xc7dsp

[yosys.git] / techlibs / xilinx / abc_xc7.lut

diff --git a/techlibs/xilinx/abc_xc7.lut b/techlibs/xilinx/abc_xc7.lut
index 3a7dc268d9fdd8cf20d7a535698241afea75dc47..bcbdec127783877af2a3aaebc67cf45a689bce54 100644 (file)
--- a/techlibs/xilinx/abc_xc7.lut
+++ b/techlibs/xilinx/abc_xc7.lut
@@ -1,14 +1,15 @@
-# Max delays from https://github.com/SymbiFlow/prjxray-db/blob/34ea6eb08a63d21ec16264ad37a0a7b142ff6031/artix7/timings/CLBLL_L.sdf
+# Max delays from https://github.com/SymbiFlow/prjxray-db/blob/82bf5f158cd8e9a11ac4d04f1aeef48ed1a528a5/artix7/timings/CLBLL_L.sdf
+#            and  https://github.com/SymbiFlow/prjxray-db/blob/82bf5f158cd8e9a11ac4d04f1aeef48ed1a528a5/artix7/tile_type_CLBLL_L.json
 
 # K    area    delay
-1      1       124
-2      2       124 235
-3      3       124 235 399
-4      3       124 235 399 490
-5      3       124 235 399 490 620
-6      5       124 235 399 490 620 632
-                # F7BMUX
-7      10      296 420 531 695 756 916 928
-                # F8MUX
-                    # F8MUX+F7BMUX
-8      20      273 569 693 804 968 1029 1189 1201
+1      1       127
+2      2       127 238
+3      3       127 238 407
+4      3       127 238 407 472
+5      3       127 238 407 472 631
+6      5       127 238 407 472 631 642
+               # (F7[AB]MUX.S + [AC]OUTMUX) / 2
+7      10      464 513 624 793 858 1017 1028
+               # F8MUX.S+BOUTMUX
+                   # F8MUX.I0+F7MUX.S+BOUTMUX
+8      20      468 585 634 745 914 979 1138 1149