m5_root = os.path.dirname(config_root)
addToPath(config_root+'/configs/common')
addToPath(config_root+'/configs/ruby')
+addToPath(config_root+'/configs/topologies')
+import Options
import Ruby
parser = optparse.OptionParser()
+Options.addCommonOptions(parser)
-#
# Add the ruby specific and protocol specific options
-#
Ruby.define_options(parser)
-execfile(os.path.join(config_root, "configs/common", "Options.py"))
-
(options, args) = parser.parse_args()
#
options.num_cpus = nb_cores
# system simulated
-system = System(cpu = cpus, physmem = PhysicalMemory())
+system = System(cpu = cpus, clk_domain = SrcClockDomain(clock = '1GHz'))
+
+# Create a seperate clock domain for components that should run at
+# CPUs frequency
+system.cpu.clk_domain = SrcClockDomain(clock = '2GHz')
-Ruby.create_system(options, system)
+Ruby.create_system(options, False, system)
-assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
+# Create a separate clock domain for Ruby
+system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock)
+
+assert(options.num_cpus == len(system.ruby._cpu_ports))
for (i, cpu) in enumerate(system.cpu):
+ # create the interrupt controller
+ cpu.createInterruptController()
+
#
# Tie the cpu ports to the ruby cpu ports
#
- cpu.icache_port = system.ruby._cpu_ruby_ports[i].port
- cpu.dcache_port = system.ruby._cpu_ruby_ports[i].port
-
-# Connect the system port for loading of binaries etc
-system.system_port = system.ruby._sys_port_proxy.port
+ cpu.connectAllPorts(system.ruby._cpu_ports[i])
# -----------------------
# run simulation