riscv: fix AMO, LR and SC instructions

[gem5.git] / tests / configs / tsunami-simple-timing-dual.py

diff --git a/tests/configs/tsunami-simple-timing-dual.py b/tests/configs/tsunami-simple-timing-dual.py
index 516495d18cb7d5964efc19cafee554036ebbee2b..a4653c2d4a2b7a03fec09909d8968dc66d95d99b 100644 (file)
--- a/tests/configs/tsunami-simple-timing-dual.py
+++ b/tests/configs/tsunami-simple-timing-dual.py
@@ -1,6 +1,15 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
+# Copyright (c) 2012 ARM Limited
 # All rights reserved.
 #
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are
 # met: redistributions of source code must retain the above copyright
@@ -24,18 +33,12 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
-# Authors: Steve Reinhardt
+# Authors: Andreas Sandberg
 
-import m5
 from m5.objects import *
-m5.AddToPath('../configs/common')
-import FSConfig
-
-cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(2) ]
-system = FSConfig.makeLinuxAlphaSystem('timing')
-system.cpu = cpus
-for c in cpus:
-    c.connectMemPorts(system.membus)
-    c.mem = system.physmem
+from alpha_generic import *
 
-root = Root(clock = '2GHz', system = system)
+root = LinuxAlphaFSSystem(mem_mode='timing',
+                          mem_class=DDR3_1600_8x8,
+                          cpu_class=TimingSimpleCPU,
+                          num_cpus=2).create_root()