Stats: Update the x86 stats to reflect changing stupd to a store and update.

[gem5.git] / tests / long / 10.mcf / ref / x86 / linux / simple-atomic / config.ini

diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini b/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
index e1b2ed0f4fb566b4651f4fbdb853875356f86660..f7e610d0339b5f48b476cc26a940df42ea120073 100644 (file)
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
@@ -1,7 +1,9 @@
 [root]
 type=Root
 children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
 
 [system]
 type=System
@@ -12,9 +14,12 @@ physmem=system.physmem
 [system.cpu]
 type=AtomicSimpleCPU
 children=dtb itb tracer workload
+checker=Null
 clock=500
 cpu_id=0
 defer_registration=false
+do_checkpoint_insts=true
+do_statistics_insts=true
 dtb=system.cpu.dtb
 function_trace=false
 function_trace_start=0
@@ -23,9 +28,11 @@ max_insts_all_threads=0
 max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
+numThreads=1
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -34,11 +41,11 @@ dcache_port=system.membus.port[2]
 icache_port=system.membus.port[1]
 
 [system.cpu.dtb]
-type=X86DTB
+type=X86TLB
 size=64
 
 [system.cpu.itb]
-type=X86ITB
+type=X86TLB
 size=64
 
 [system.cpu.tracer]
@@ -47,16 +54,19 @@ type=ExeTracer
 [system.cpu.workload]
 type=LiveProcess
 cmd=mcf mcf.in
-cwd=build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic
+cwd=build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic
 egid=100
 env=
+errout=cerr
 euid=100
 executable=/dist/m5/cpu2000/binaries/x86/linux/mcf
 gid=100
 input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=55300000000
 system=system
 uid=100
 
@@ -65,14 +75,17 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
-responder_set=false
+header_cycles=1
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
 [system.physmem]
 type=PhysicalMemory
 file=
-latency=1
+latency=30000
+latency_var=0
+null=false
 range=0:268435455
 zero=false
 port=system.membus.port[0]