[root]
type=Root
children=system
+eventq_index=0
full_system=true
+sim_quantum=0
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
[system]
type=LinuxArmSystem
-children=bridge cf0 cpu intrctrl iobus iocache l2c membus nvmem physmem realview terminal toL2Bus vncserver
-boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
-boot_loader_mem=system.nvmem
-boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
-flags_addr=268435504
-gic_cpu_addr=520093952
+children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
+atags_addr=134217728
+boot_loader=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/boot_emm.arm
+boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
+cache_line_size=64
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+dtb_filename=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
+early_kernel_symbols=false
+enable_context_switch_stats_dump=false
+eventq_index=0
+exit_on_work_items=false
+flags_addr=469827632
+gic_cpu_addr=738205696
+have_large_asid_64=false
+have_lpae=true
+have_security=false
+have_virtualization=false
+highest_el_is_64=false
init_param=0
-kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
+kernel=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
+kernel_addr_check=true
load_addr_mask=268435455
-machine_type=RealView_PBX
+load_offset=2147483648
+machine_type=VExpress_EMM
mem_mode=timing
-memories=system.nvmem system.physmem
-midr_regval=890224640
+mem_ranges=2147483648:2415919103:0:0:0:0
+memories=system.physmem system.realview.nvmem system.realview.vram
+mmap_using_noreserve=false
+multi_proc=true
+multi_thread=false
num_work_ids=16
-physmem=system.physmem
-readfile=tests/halt.sh
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+panic_on_oops=true
+panic_on_panic=true
+phys_addr_range_64=40
+power_model=Null
+readfile=/usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../halt.sh
+reset_addr_64=0
symbolfile=
+thermal_components=
+thermal_model=Null
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
-system_port=system.membus.port[7]
+system_port=system.membus.slave[1]
[system.bridge]
type=Bridge
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
delay=50000
-nack_delay=4000
-ranges=268435456:520093695 1073741824:18446744073709551615
+eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+ranges=788529152:805306367:0:0:0:0 721420288:725614591:0:0:0:0 805306368:1073741823:0:0:0:0 1073741824:1610612735:0:0:0:0 402653184:469762047:0:0:0:0 469762048:536870911:0:0:0:0
req_size=16
resp_size=16
-write_ack=false
-master=system.iobus.port[0]
-slave=system.membus.port[0]
+master=system.iobus.slave[0]
+slave=system.membus.master[0]
[system.cf0]
type=IdeDisk
children=image
delay=1000000
driveID=master
+eventq_index=0
image=system.cf0.image
[system.cf0.image]
type=CowDiskImage
children=child
child=system.cf0.image.child
+eventq_index=0
image_file=
read_only=false
table_size=65536
[system.cf0.image.child]
type=RawDiskImage
-image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
+eventq_index=0
+image_file=/usr/local/google/home/gabeblack/gem5/dist/m5/system/disks/linux-aarch32-ael.img
read_only=true
+[system.clk_domain]
+type=SrcClockDomain
+clock=1000
+domain_id=-1
+eventq_index=0
+init_perf_level=0
+voltage_domain=system.voltage_domain
+
[system.cpu]
type=DerivO3CPU
-children=dcache dtb fuPool icache interrupts itb tracer
-BTBEntries=4096
-BTBTagSize=16
+children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
LFSTSize=1024
-LQEntries=32
+LQEntries=16
LSQCheckLoads=true
-LSQDepCheckShift=4
-RASSize=16
-SQEntries=32
+LSQDepCheckShift=0
+SQEntries=16
SSITSize=1024
activity=0
backComSize=5
-cachePorts=200
+branchPred=system.cpu.branchPred
+cacheStorePorts=200
checker=Null
-choiceCtrBits=2
-choicePredictorSize=8192
-clock=500
+clk_domain=system.cpu_clk_domain
commitToDecodeDelay=1
commitToFetchDelay=1
commitToIEWDelay=1
commitWidth=8
cpu_id=0
decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-defer_registration=false
-dispatchWidth=8
+decodeToRenameDelay=2
+decodeWidth=3
+default_p_state=UNDEFINED
+dispatchWidth=6
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
+dstage2_mmu=system.cpu.dstage2_mmu
dtb=system.cpu.dtb
-fetchToDecodeDelay=1
+eventq_index=0
+fetchBufferSize=16
+fetchQueueSize=32
+fetchToDecodeDelay=3
fetchTrapLatency=1
-fetchWidth=8
+fetchWidth=3
forwardComSize=5
fuPool=system.cpu.fuPool
function_trace=false
function_trace_start=0
-globalCtrBits=2
-globalHistoryBits=13
-globalPredictorSize=8192
iewToCommitDelay=1
iewToDecodeDelay=1
iewToFetchDelay=1
iewToRenameDelay=1
-instShiftAmt=2
interrupts=system.cpu.interrupts
+isa=system.cpu.isa
issueToExecuteDelay=1
issueWidth=8
+istage2_mmu=system.cpu.istage2_mmu
itb=system.cpu.itb
-localCtrBits=2
-localHistoryBits=11
-localHistoryTableSize=2048
-localPredictorSize=2048
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
needsTSO=false
-numIQEntries=64
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
+numIQEntries=32
+numPhysCCRegs=640
+numPhysFloatRegs=192
+numPhysIntRegs=128
+numROBEntries=40
numRobs=1
numThreads=1
-phase=0
-predType=tournament
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
profile=0
progress_interval=0
renameToDecodeDelay=1
renameToFetchDelay=1
-renameToIEWDelay=2
+renameToIEWDelay=1
renameToROBDelay=1
-renameWidth=8
+renameWidth=3
+simpoint_start_insts=
smtCommitPolicy=RoundRobin
smtFetchPolicy=SingleThread
smtIQPolicy=Partitioned
smtNumFetchingThreads=1
smtROBPolicy=Partitioned
smtROBThreshold=100
+socket_id=0
squashWidth=8
store_set_clear_period=250000
+switched_out=false
+syscallRetryLatency=10000
system=system
tracer=system.cpu.tracer
trapLatency=13
-wbDepth=1
wbWidth=8
workload=
dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
+[system.cpu.branchPred]
+type=BiModeBP
+BTBEntries=2048
+BTBTagSize=18
+RASSize=16
+choiceCtrBits=2
+choicePredictorSize=8192
+eventq_index=0
+globalCtrBits=2
+globalPredictorSize=8192
+indirectHashGHR=true
+indirectHashTargets=true
+indirectPathLength=3
+indirectSets=256
+indirectTagSize=16
+indirectWays=2
+instShiftAmt=2
+numThreads=1
+useIndirect=true
+
[system.cpu.dcache]
-type=BaseCache
-addr_range=0:18446744073709551615
+type=Cache
+children=tags
+addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
-block_size=64
-forward_snoops=true
-hash_delay=1
-is_top_level=true
-latency=1000
+clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
+data_latency=2
+default_p_state=UNDEFINED
+demand_mshr_reserve=1
+eventq_index=0
+is_read_only=false
max_miss_count=0
mshrs=4
-num_cpus=1
-prefetch_data_accesses_only=false
-prefetch_degree=1
-prefetch_latency=10000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
-prefetch_past_page=false
-prefetch_policy=none
-prefetch_serial_squash=false
-prefetch_use_cpu_id=true
-prefetcher_size=100
-prioritizeRequests=false
-repl=Null
+prefetcher=Null
+response_latency=2
+sequential_access=false
size=32768
-subblock_size=0
+system=system
+tag_latency=2
+tags=system.cpu.dcache.tags
tgts_per_mshr=20
-trace_addr=0
-two_queue=false
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
-mem_side=system.toL2Bus.port[2]
+mem_side=system.cpu.toL2Bus.slave[1]
+
+[system.cpu.dcache.tags]
+type=LRU
+assoc=4
+block_size=64
+clk_domain=system.cpu_clk_domain
+data_latency=2
+default_p_state=UNDEFINED
+eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+sequential_access=false
+size=32768
+tag_latency=2
+
+[system.cpu.dstage2_mmu]
+type=ArmStage2MMU
+children=stage2_tlb
+eventq_index=0
+stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
+sys=system
+tlb=system.cpu.dtb
+
+[system.cpu.dstage2_mmu.stage2_tlb]
+type=ArmTLB
+children=walker
+eventq_index=0
+is_stage2=true
+size=32
+walker=system.cpu.dstage2_mmu.stage2_tlb.walker
+
+[system.cpu.dstage2_mmu.stage2_tlb.walker]
+type=ArmTableWalker
+clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+is_stage2=true
+num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+sys=system
[system.cpu.dtb]
type=ArmTLB
children=walker
+eventq_index=0
+is_stage2=false
size=64
walker=system.cpu.dtb.walker
[system.cpu.dtb.walker]
type=ArmTableWalker
-max_backoff=100000
-min_backoff=0
+clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+is_stage2=false
+num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
-port=system.toL2Bus.port[4]
+port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
+children=FUList0 FUList1 FUList2 FUList3 FUList4
+FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4
+eventq_index=0
[system.cpu.fuPool.FUList0]
type=FUDesc
children=opList
-count=6
+count=2
+eventq_index=0
opList=system.cpu.fuPool.FUList0.opList
[system.cpu.fuPool.FUList0.opList]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=IntAlu
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList1]
type=FUDesc
-children=opList0 opList1
-count=2
-opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
+children=opList0 opList1 opList2
+count=1
+eventq_index=0
+opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 system.cpu.fuPool.FUList1.opList2
[system.cpu.fuPool.FUList1.opList0]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=IntMult
opLat=3
+pipelined=true
[system.cpu.fuPool.FUList1.opList1]
type=OpDesc
-issueLat=19
+eventq_index=0
opClass=IntDiv
-opLat=20
+opLat=12
+pipelined=false
+
+[system.cpu.fuPool.FUList1.opList2]
+type=OpDesc
+eventq_index=0
+opClass=IprAccess
+opLat=3
+pipelined=true
[system.cpu.fuPool.FUList2]
type=FUDesc
-children=opList0 opList1 opList2
-count=4
-opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
+children=opList0 opList1
+count=1
+eventq_index=0
+opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1
[system.cpu.fuPool.FUList2.opList0]
type=OpDesc
-issueLat=1
-opClass=FloatAdd
+eventq_index=0
+opClass=MemRead
opLat=2
+pipelined=true
[system.cpu.fuPool.FUList2.opList1]
type=OpDesc
-issueLat=1
-opClass=FloatCmp
-opLat=2
-
-[system.cpu.fuPool.FUList2.opList2]
-type=OpDesc
-issueLat=1
-opClass=FloatCvt
+eventq_index=0
+opClass=FloatMemRead
opLat=2
+pipelined=true
[system.cpu.fuPool.FUList3]
type=FUDesc
-children=opList0 opList1 opList2
-count=2
-opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
+children=opList0 opList1
+count=1
+eventq_index=0
+opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1
[system.cpu.fuPool.FUList3.opList0]
type=OpDesc
-issueLat=1
-opClass=FloatMult
-opLat=4
+eventq_index=0
+opClass=MemWrite
+opLat=2
+pipelined=true
[system.cpu.fuPool.FUList3.opList1]
type=OpDesc
-issueLat=12
-opClass=FloatDiv
-opLat=12
-
-[system.cpu.fuPool.FUList3.opList2]
-type=OpDesc
-issueLat=24
-opClass=FloatSqrt
-opLat=24
+eventq_index=0
+opClass=FloatMemWrite
+opLat=2
+pipelined=true
[system.cpu.fuPool.FUList4]
type=FUDesc
-children=opList
-count=0
-opList=system.cpu.fuPool.FUList4.opList
-
-[system.cpu.fuPool.FUList4.opList]
-type=OpDesc
-issueLat=1
-opClass=MemRead
-opLat=1
-
-[system.cpu.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
+children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 opList26 opList27
+count=2
+eventq_index=0
+opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25 system.cpu.fuPool.FUList4.opList26 system.cpu.fuPool.FUList4.opList27
-[system.cpu.fuPool.FUList5.opList00]
+[system.cpu.fuPool.FUList4.opList00]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdAdd
-opLat=1
+opLat=4
+pipelined=true
-[system.cpu.fuPool.FUList5.opList01]
+[system.cpu.fuPool.FUList4.opList01]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdAddAcc
-opLat=1
+opLat=4
+pipelined=true
-[system.cpu.fuPool.FUList5.opList02]
+[system.cpu.fuPool.FUList4.opList02]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdAlu
-opLat=1
+opLat=4
+pipelined=true
-[system.cpu.fuPool.FUList5.opList03]
+[system.cpu.fuPool.FUList4.opList03]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdCmp
-opLat=1
+opLat=4
+pipelined=true
-[system.cpu.fuPool.FUList5.opList04]
+[system.cpu.fuPool.FUList4.opList04]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdCvt
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList05]
+[system.cpu.fuPool.FUList4.opList05]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdMisc
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList06]
+[system.cpu.fuPool.FUList4.opList06]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdMult
-opLat=1
+opLat=5
+pipelined=true
-[system.cpu.fuPool.FUList5.opList07]
+[system.cpu.fuPool.FUList4.opList07]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdMultAcc
-opLat=1
+opLat=5
+pipelined=true
-[system.cpu.fuPool.FUList5.opList08]
+[system.cpu.fuPool.FUList4.opList08]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdShift
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList09]
+[system.cpu.fuPool.FUList4.opList09]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdShiftAcc
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList10]
+[system.cpu.fuPool.FUList4.opList10]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdSqrt
-opLat=1
+opLat=9
+pipelined=true
-[system.cpu.fuPool.FUList5.opList11]
+[system.cpu.fuPool.FUList4.opList11]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatAdd
-opLat=1
+opLat=5
+pipelined=true
-[system.cpu.fuPool.FUList5.opList12]
+[system.cpu.fuPool.FUList4.opList12]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatAlu
-opLat=1
+opLat=5
+pipelined=true
-[system.cpu.fuPool.FUList5.opList13]
+[system.cpu.fuPool.FUList4.opList13]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatCmp
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList14]
+[system.cpu.fuPool.FUList4.opList14]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatCvt
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList15]
+[system.cpu.fuPool.FUList4.opList15]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatDiv
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList16]
+[system.cpu.fuPool.FUList4.opList16]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatMisc
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList17]
+[system.cpu.fuPool.FUList4.opList17]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatMult
-opLat=1
+opLat=3
+pipelined=true
-[system.cpu.fuPool.FUList5.opList18]
+[system.cpu.fuPool.FUList4.opList18]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatMultAcc
-opLat=1
+opLat=5
+pipelined=true
-[system.cpu.fuPool.FUList5.opList19]
+[system.cpu.fuPool.FUList4.opList19]
type=OpDesc
-issueLat=1
+eventq_index=0
opClass=SimdFloatSqrt
-opLat=1
+opLat=9
+pipelined=true
-[system.cpu.fuPool.FUList6]
-type=FUDesc
-children=opList
-count=0
-opList=system.cpu.fuPool.FUList6.opList
+[system.cpu.fuPool.FUList4.opList20]
+type=OpDesc
+eventq_index=0
+opClass=FloatAdd
+opLat=5
+pipelined=true
-[system.cpu.fuPool.FUList6.opList]
+[system.cpu.fuPool.FUList4.opList21]
type=OpDesc
-issueLat=1
-opClass=MemWrite
-opLat=1
+eventq_index=0
+opClass=FloatCmp
+opLat=5
+pipelined=true
-[system.cpu.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1
-count=4
-opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
+[system.cpu.fuPool.FUList4.opList22]
+type=OpDesc
+eventq_index=0
+opClass=FloatCvt
+opLat=5
+pipelined=true
-[system.cpu.fuPool.FUList7.opList0]
+[system.cpu.fuPool.FUList4.opList23]
type=OpDesc
-issueLat=1
-opClass=MemRead
-opLat=1
+eventq_index=0
+opClass=FloatDiv
+opLat=9
+pipelined=false
-[system.cpu.fuPool.FUList7.opList1]
+[system.cpu.fuPool.FUList4.opList24]
type=OpDesc
-issueLat=1
-opClass=MemWrite
-opLat=1
+eventq_index=0
+opClass=FloatSqrt
+opLat=33
+pipelined=false
-[system.cpu.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-opList=system.cpu.fuPool.FUList8.opList
+[system.cpu.fuPool.FUList4.opList25]
+type=OpDesc
+eventq_index=0
+opClass=FloatMult
+opLat=4
+pipelined=true
-[system.cpu.fuPool.FUList8.opList]
+[system.cpu.fuPool.FUList4.opList26]
type=OpDesc
-issueLat=3
-opClass=IprAccess
+eventq_index=0
+opClass=FloatMultAcc
+opLat=5
+pipelined=true
+
+[system.cpu.fuPool.FUList4.opList27]
+type=OpDesc
+eventq_index=0
+opClass=FloatMisc
opLat=3
+pipelined=true
[system.cpu.icache]
-type=BaseCache
-addr_range=0:18446744073709551615
+type=Cache
+children=tags
+addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
-block_size=64
-forward_snoops=true
-hash_delay=1
-is_top_level=true
-latency=1000
+clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
+data_latency=2
+default_p_state=UNDEFINED
+demand_mshr_reserve=1
+eventq_index=0
+is_read_only=true
max_miss_count=0
mshrs=4
-num_cpus=1
-prefetch_data_accesses_only=false
-prefetch_degree=1
-prefetch_latency=10000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
-prefetch_past_page=false
-prefetch_policy=none
-prefetch_serial_squash=false
-prefetch_use_cpu_id=true
-prefetcher_size=100
-prioritizeRequests=false
-repl=Null
+prefetcher=Null
+response_latency=2
+sequential_access=false
size=32768
-subblock_size=0
+system=system
+tag_latency=2
+tags=system.cpu.icache.tags
tgts_per_mshr=20
-trace_addr=0
-two_queue=false
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
-mem_side=system.toL2Bus.port[1]
+mem_side=system.cpu.toL2Bus.slave[0]
+
+[system.cpu.icache.tags]
+type=LRU
+assoc=1
+block_size=64
+clk_domain=system.cpu_clk_domain
+data_latency=2
+default_p_state=UNDEFINED
+eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+sequential_access=false
+size=32768
+tag_latency=2
[system.cpu.interrupts]
type=ArmInterrupts
+eventq_index=0
+
+[system.cpu.isa]
+type=ArmISA
+decoderFlavour=Generic
+eventq_index=0
+fpsid=1090793632
+id_aa64afr0_el1=0
+id_aa64afr1_el1=0
+id_aa64dfr0_el1=1052678
+id_aa64dfr1_el1=0
+id_aa64isar0_el1=0
+id_aa64isar1_el1=0
+id_aa64mmfr0_el1=15728642
+id_aa64mmfr1_el1=0
+id_isar0=34607377
+id_isar1=34677009
+id_isar2=555950401
+id_isar3=17899825
+id_isar4=268501314
+id_isar5=0
+id_mmfr0=270536963
+id_mmfr1=0
+id_mmfr2=19070976
+id_mmfr3=34611729
+midr=1091551472
+pmu=Null
+system=system
+
+[system.cpu.istage2_mmu]
+type=ArmStage2MMU
+children=stage2_tlb
+eventq_index=0
+stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
+sys=system
+tlb=system.cpu.itb
+
+[system.cpu.istage2_mmu.stage2_tlb]
+type=ArmTLB
+children=walker
+eventq_index=0
+is_stage2=true
+size=32
+walker=system.cpu.istage2_mmu.stage2_tlb.walker
+
+[system.cpu.istage2_mmu.stage2_tlb.walker]
+type=ArmTableWalker
+clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+is_stage2=true
+num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+sys=system
[system.cpu.itb]
type=ArmTLB
children=walker
+eventq_index=0
+is_stage2=false
size=64
walker=system.cpu.itb.walker
[system.cpu.itb.walker]
type=ArmTableWalker
-max_backoff=100000
-min_backoff=0
+clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+is_stage2=false
+num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
-port=system.toL2Bus.port[3]
+port=system.cpu.toL2Bus.slave[2]
+
+[system.cpu.l2cache]
+type=Cache
+children=tags
+addr_ranges=0:18446744073709551615:0:0:0:0
+assoc=8
+clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
+data_latency=20
+default_p_state=UNDEFINED
+demand_mshr_reserve=1
+eventq_index=0
+is_read_only=false
+max_miss_count=0
+mshrs=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+prefetch_on_access=false
+prefetcher=Null
+response_latency=20
+sequential_access=false
+size=4194304
+system=system
+tag_latency=20
+tags=system.cpu.l2cache.tags
+tgts_per_mshr=12
+write_buffers=8
+writeback_clean=false
+cpu_side=system.cpu.toL2Bus.master[0]
+mem_side=system.membus.slave[2]
+
+[system.cpu.l2cache.tags]
+type=LRU
+assoc=8
+block_size=64
+clk_domain=system.cpu_clk_domain
+data_latency=20
+default_p_state=UNDEFINED
+eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+sequential_access=false
+size=4194304
+tag_latency=20
+
+[system.cpu.toL2Bus]
+type=CoherentXBar
+children=snoop_filter
+clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+forward_latency=0
+frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=false
+power_model=Null
+response_latency=1
+snoop_filter=system.cpu.toL2Bus.snoop_filter
+snoop_response_latency=1
+system=system
+use_default_range=false
+width=32
+master=system.cpu.l2cache.cpu_side
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
[system.cpu.tracer]
type=ExeTracer
+eventq_index=0
+
+[system.cpu_clk_domain]
+type=SrcClockDomain
+clock=500
+domain_id=-1
+eventq_index=0
+init_perf_level=0
+voltage_domain=system.voltage_domain
+
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
[system.intrctrl]
type=IntrControl
+eventq_index=0
sys=system
[system.iobus]
-type=Bus
-block_size=64
-bus_id=0
-clock=1000
-header_cycles=1
+type=NoncoherentXBar
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+forward_latency=1
+frontend_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+response_latency=2
use_default_range=false
-width=64
-port=system.bridge.master system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.clcd.dma system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.cf_ctrl.dma system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc_fake.pio system.realview.flash_fake.pio system.iocache.cpu_side
+width=16
+master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side
+slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
-type=BaseCache
-addr_range=0:268435455
+type=Cache
+children=tags
+addr_ranges=2147483648:2415919103:0:0:0:0
assoc=8
-block_size=64
-forward_snoops=false
-hash_delay=1
-is_top_level=false
-latency=50000
+clk_domain=system.clk_domain
+clusivity=mostly_incl
+data_latency=50
+default_p_state=UNDEFINED
+demand_mshr_reserve=1
+eventq_index=0
+is_read_only=false
max_miss_count=0
mshrs=20
-num_cpus=1
-prefetch_data_accesses_only=false
-prefetch_degree=1
-prefetch_latency=500000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
-prefetch_past_page=false
-prefetch_policy=none
-prefetch_serial_squash=false
-prefetch_use_cpu_id=true
-prefetcher_size=100
-prioritizeRequests=false
-repl=Null
+prefetcher=Null
+response_latency=50
+sequential_access=false
size=1024
-subblock_size=0
+system=system
+tag_latency=50
+tags=system.iocache.tags
tgts_per_mshr=12
-trace_addr=0
-two_queue=false
write_buffers=8
-cpu_side=system.iobus.port[28]
-mem_side=system.membus.port[8]
+writeback_clean=false
+cpu_side=system.iobus.master[25]
+mem_side=system.membus.slave[3]
-[system.l2c]
-type=BaseCache
-addr_range=0:18446744073709551615
+[system.iocache.tags]
+type=LRU
assoc=8
block_size=64
-forward_snoops=true
-hash_delay=1
-is_top_level=false
-latency=10000
-max_miss_count=0
-mshrs=92
-num_cpus=1
-prefetch_data_accesses_only=false
-prefetch_degree=1
-prefetch_latency=100000
-prefetch_on_access=false
-prefetch_past_page=false
-prefetch_policy=none
-prefetch_serial_squash=false
-prefetch_use_cpu_id=true
-prefetcher_size=100
-prioritizeRequests=false
-repl=Null
-size=4194304
-subblock_size=0
-tgts_per_mshr=16
-trace_addr=0
-two_queue=false
-write_buffers=8
-cpu_side=system.toL2Bus.port[0]
-mem_side=system.membus.port[9]
+clk_domain=system.clk_domain
+data_latency=50
+default_p_state=UNDEFINED
+eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+sequential_access=false
+size=1024
+tag_latency=50
[system.membus]
-type=Bus
-children=badaddr_responder
-block_size=64
-bus_id=1
-clock=1000
-header_cycles=1
+type=CoherentXBar
+children=badaddr_responder snoop_filter
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+forward_latency=4
+frontend_latency=3
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=true
+power_model=Null
+response_latency=2
+snoop_filter=system.membus.snoop_filter
+snoop_response_latency=4
+system=system
use_default_range=false
-width=64
+width=16
default=system.membus.badaddr_responder.pio
-port=system.bridge.slave system.nvmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.system_port system.iocache.mem_side system.l2c.mem_side
+master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
+slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
[system.membus.badaddr_responder]
type=IsaFake
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=0
-pio_latency=1000
+pio_latency=100000
pio_size=8
+power_model=Null
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
warn_access=warn
pio=system.membus.default
-[system.nvmem]
-type=PhysicalMemory
-file=
-latency=30000
-latency_var=0
-null=false
-range=2147483648:2214592511
-zero=true
-port=system.membus.port[1]
+[system.membus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=1
+max_capacity=8388608
+system=system
[system.physmem]
-type=PhysicalMemory
-file=
-latency=30000
-latency_var=0
+type=DRAMCtrl
+IDD0=0.055000
+IDD02=0.000000
+IDD2N=0.032000
+IDD2N2=0.000000
+IDD2P0=0.000000
+IDD2P02=0.000000
+IDD2P1=0.032000
+IDD2P12=0.000000
+IDD3N=0.038000
+IDD3N2=0.000000
+IDD3P0=0.000000
+IDD3P02=0.000000
+IDD3P1=0.038000
+IDD3P12=0.000000
+IDD4R=0.157000
+IDD4R2=0.000000
+IDD4W=0.125000
+IDD4W2=0.000000
+IDD5=0.235000
+IDD52=0.000000
+IDD6=0.020000
+IDD62=0.000000
+VDD=1.500000
+VDD2=0.000000
+activation_limit=4
+addr_mapping=RoRaBaCoCh
+bank_groups_per_rank=0
+banks_per_rank=8
+burst_length=8
+channels=1
+clk_domain=system.clk_domain
+conf_table_reported=true
+default_p_state=UNDEFINED
+device_bus_width=8
+device_rowbuffer_size=1024
+device_size=536870912
+devices_per_rank=8
+dll=true
+eventq_index=0
+in_addr_map=true
+kvm_map=true
+max_accesses_per_row=16
+mem_sched_policy=frfcfs
+min_writes_per_switch=16
null=false
-range=0:134217727
-zero=true
-port=system.membus.port[2]
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+page_policy=open_adaptive
+power_model=Null
+range=2147483648:2415919103:0:0:0:0
+ranks_per_channel=2
+read_buffer_size=32
+static_backend_latency=10000
+static_frontend_latency=10000
+tBURST=5000
+tCCD_L=0
+tCK=1250
+tCL=13750
+tCS=2500
+tRAS=35000
+tRCD=13750
+tREFI=7800000
+tRFC=260000
+tRP=13750
+tRRD=6000
+tRRD_L=0
+tRTP=7500
+tRTW=2500
+tWR=15000
+tWTR=7500
+tXAW=30000
+tXP=6000
+tXPDLL=0
+tXS=270000
+tXSDLL=0
+write_buffer_size=64
+write_high_thresh_perc=85
+write_low_thresh_perc=50
+port=system.membus.master[5]
[system.realview]
type=RealView
-children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake realview_io rtc_fake sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
+children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
+eventq_index=0
intrctrl=system.intrctrl
-pci_cfg_base=0
system=system
-[system.realview.a9scu]
-type=A9SCU
-pio_addr=520093696
-pio_latency=1000
-system=system
-pio=system.membus.port[5]
-
[system.realview.aaci_fake]
type=AmbaFake
amba_id=0
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
ignore_access=false
-pio_addr=268451840
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470024192
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[24]
+pio=system.iobus.master[18]
[system.realview.cf_ctrl]
type=IdeController
-BAR0=402653184
+BAR0=471465984
BAR0LegacyIO=true
-BAR0Size=16
-BAR1=402653440
+BAR0Size=256
+BAR1=471466240
BAR1LegacyIO=true
-BAR1Size=1
+BAR1Size=4096
BAR2=1
BAR2LegacyIO=false
BAR2Size=8
BAR5Size=0
BIST=0
CacheLineSize=0
+CapabilityPtr=0
CardbusCIS=0
ClassCode=1
Command=1
InterruptLine=31
InterruptPin=1
LatencyTimer=0
+LegacyIOBase=0
+MSICAPBaseOffset=0
+MSICAPCapId=0
+MSICAPMaskBits=0
+MSICAPMsgAddr=0
+MSICAPMsgCtrl=0
+MSICAPMsgData=0
+MSICAPMsgUpperAddr=0
+MSICAPNextCapability=0
+MSICAPPendingBits=0
+MSIXCAPBaseOffset=0
+MSIXCAPCapId=0
+MSIXCAPNextCapability=0
+MSIXMsgCtrl=0
+MSIXPbaOffset=0
+MSIXTableOffset=0
MaximumLatency=0
MinimumGrant=0
+PMCAPBaseOffset=0
+PMCAPCapId=0
+PMCAPCapabilities=0
+PMCAPCtrlStatus=0
+PMCAPNextCapability=0
+PXCAPBaseOffset=0
+PXCAPCapId=0
+PXCAPCapabilities=0
+PXCAPDevCap2=0
+PXCAPDevCapabilities=0
+PXCAPDevCtrl=0
+PXCAPDevCtrl2=0
+PXCAPDevStatus=0
+PXCAPLinkCap=0
+PXCAPLinkCtrl=0
+PXCAPLinkStatus=0
+PXCAPNextCapability=0
ProgIF=133
Revision=0
Status=640
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
+clk_domain=system.clk_domain
config_latency=20000
ctrl_offset=2
-disks=system.cf0
-io_shift=1
-max_backoff_delay=10000000
-min_backoff_delay=4000
+default_p_state=UNDEFINED
+disks=
+eventq_index=0
+host=system.realview.pci_host
+io_shift=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pci_bus=2
-pci_dev=7
+pci_dev=0
pci_func=0
-pio_latency=1000
-platform=system.realview
+pio_latency=30000
+power_model=Null
system=system
-config=system.iobus.port[10]
-dma=system.iobus.port[11]
-pio=system.iobus.port[9]
+dma=system.iobus.slave[2]
+pio=system.iobus.master[9]
[system.realview.clcd]
type=Pl111
amba_id=1315089
-clock=41667
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+enable_capture=true
+eventq_index=0
gic=system.realview.gic
-int_num=55
-max_backoff_delay=10000000
-min_backoff_delay=4000
-pio_addr=268566528
+int_num=46
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=471793664
pio_latency=10000
+pixel_clock=41667
+power_model=Null
system=system
vnc=system.vncserver
-dma=system.iobus.port[6]
-pio=system.iobus.port[5]
-
-[system.realview.dmac_fake]
-type=AmbaFake
-amba_id=0
-ignore_access=false
-pio_addr=268632064
-pio_latency=1000
+dma=system.iobus.slave[1]
+pio=system.iobus.master[5]
+
+[system.realview.dcc]
+type=SubSystem
+children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
+eventq_index=0
+thermal_domain=Null
+
+[system.realview.dcc.osc_cpu]
+type=RealViewOsc
+dcc=0
+device=0
+eventq_index=0
+freq=16667
+parent=system.realview.realview_io
+position=0
+site=1
+voltage_domain=system.voltage_domain
+
+[system.realview.dcc.osc_ddr]
+type=RealViewOsc
+dcc=0
+device=8
+eventq_index=0
+freq=25000
+parent=system.realview.realview_io
+position=0
+site=1
+voltage_domain=system.voltage_domain
+
+[system.realview.dcc.osc_hsbm]
+type=RealViewOsc
+dcc=0
+device=4
+eventq_index=0
+freq=25000
+parent=system.realview.realview_io
+position=0
+site=1
+voltage_domain=system.voltage_domain
+
+[system.realview.dcc.osc_pxl]
+type=RealViewOsc
+dcc=0
+device=5
+eventq_index=0
+freq=42105
+parent=system.realview.realview_io
+position=0
+site=1
+voltage_domain=system.voltage_domain
+
+[system.realview.dcc.osc_smb]
+type=RealViewOsc
+dcc=0
+device=6
+eventq_index=0
+freq=20000
+parent=system.realview.realview_io
+position=0
+site=1
+voltage_domain=system.voltage_domain
+
+[system.realview.dcc.osc_sys]
+type=RealViewOsc
+dcc=0
+device=7
+eventq_index=0
+freq=16667
+parent=system.realview.realview_io
+position=0
+site=1
+voltage_domain=system.voltage_domain
+
+[system.realview.energy_ctrl]
+type=EnergyCtrl
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+dvfs_handler=system.dvfs_handler
+eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470286336
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[12]
-
-[system.realview.flash_fake]
-type=IsaFake
-fake_mem=true
-pio_addr=1073741824
-pio_latency=1000
-pio_size=536870912
-ret_bad_addr=false
-ret_data16=65535
-ret_data32=4294967295
-ret_data64=18446744073709551615
-ret_data8=255
+pio=system.iobus.master[22]
+
+[system.realview.ethernet]
+type=IGbE
+BAR0=0
+BAR0LegacyIO=false
+BAR0Size=131072
+BAR1=0
+BAR1LegacyIO=false
+BAR1Size=0
+BAR2=0
+BAR2LegacyIO=false
+BAR2Size=0
+BAR3=0
+BAR3LegacyIO=false
+BAR3Size=0
+BAR4=0
+BAR4LegacyIO=false
+BAR4Size=0
+BAR5=0
+BAR5LegacyIO=false
+BAR5Size=0
+BIST=0
+CacheLineSize=0
+CapabilityPtr=0
+CardbusCIS=0
+ClassCode=2
+Command=0
+DeviceID=4213
+ExpansionROM=0
+HeaderType=0
+InterruptLine=1
+InterruptPin=1
+LatencyTimer=0
+LegacyIOBase=0
+MSICAPBaseOffset=0
+MSICAPCapId=0
+MSICAPMaskBits=0
+MSICAPMsgAddr=0
+MSICAPMsgCtrl=0
+MSICAPMsgData=0
+MSICAPMsgUpperAddr=0
+MSICAPNextCapability=0
+MSICAPPendingBits=0
+MSIXCAPBaseOffset=0
+MSIXCAPCapId=0
+MSIXCAPNextCapability=0
+MSIXMsgCtrl=0
+MSIXPbaOffset=0
+MSIXTableOffset=0
+MaximumLatency=0
+MinimumGrant=255
+PMCAPBaseOffset=0
+PMCAPCapId=0
+PMCAPCapabilities=0
+PMCAPCtrlStatus=0
+PMCAPNextCapability=0
+PXCAPBaseOffset=0
+PXCAPCapId=0
+PXCAPCapabilities=0
+PXCAPDevCap2=0
+PXCAPDevCapabilities=0
+PXCAPDevCtrl=0
+PXCAPDevCtrl2=0
+PXCAPDevStatus=0
+PXCAPLinkCap=0
+PXCAPLinkCtrl=0
+PXCAPLinkStatus=0
+PXCAPNextCapability=0
+ProgIF=0
+Revision=0
+Status=0
+SubClassCode=0
+SubsystemID=4104
+SubsystemVendorID=32902
+VendorID=32902
+clk_domain=system.clk_domain
+config_latency=20000
+default_p_state=UNDEFINED
+eventq_index=0
+fetch_comp_delay=10000
+fetch_delay=10000
+hardware_address=00:90:00:00:00:01
+host=system.realview.pci_host
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pci_bus=0
+pci_dev=0
+pci_func=0
+phy_epid=896
+phy_pid=680
+pio_latency=30000
+power_model=Null
+rx_desc_cache_size=64
+rx_fifo_size=393216
+rx_write_delay=0
+system=system
+tx_desc_cache_size=64
+tx_fifo_size=393216
+tx_read_delay=0
+wb_comp_delay=10000
+wb_delay=10000
+dma=system.iobus.slave[4]
+pio=system.iobus.master[24]
+
+[system.realview.generic_timer]
+type=GenericTimer
+eventq_index=0
+gic=system.realview.gic
+int_phys=29
+int_virt=27
system=system
-update_data=false
-warn_access=
-pio=system.iobus.port[27]
[system.realview.gic]
-type=Gic
-cpu_addr=520093952
+type=Pl390
+clk_domain=system.clk_domain
+cpu_addr=738205696
cpu_pio_delay=10000
-dist_addr=520097792
+default_p_state=UNDEFINED
+dist_addr=738201600
dist_pio_delay=10000
+eventq_index=0
+gem5_extensions=false
int_latency=10000
it_lines=128
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
platform=system.realview
+power_model=Null
system=system
-pio=system.membus.port[3]
-
-[system.realview.gpio0_fake]
-type=AmbaFake
-amba_id=0
-ignore_access=false
-pio_addr=268513280
-pio_latency=1000
-system=system
-pio=system.iobus.port[19]
-
-[system.realview.gpio1_fake]
-type=AmbaFake
-amba_id=0
-ignore_access=false
-pio_addr=268517376
-pio_latency=1000
+pio=system.membus.master[2]
+
+[system.realview.hdlcd]
+type=HDLcd
+amba_id=1314816
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+enable_capture=true
+eventq_index=0
+gic=system.realview.gic
+int_num=117
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=721420288
+pio_latency=10000
+pixel_buffer_size=2048
+pixel_chunk=32
+power_model=Null
+pxl_clk=system.realview.dcc.osc_pxl
system=system
-pio=system.iobus.port[20]
+vnc=system.vncserver
+workaround_dma_line_count=true
+workaround_swap_rb=true
+dma=system.membus.slave[0]
+pio=system.iobus.master[6]
-[system.realview.gpio2_fake]
-type=AmbaFake
-amba_id=0
-ignore_access=false
-pio_addr=268521472
-pio_latency=1000
+[system.realview.ide]
+type=IdeController
+BAR0=1
+BAR0LegacyIO=false
+BAR0Size=8
+BAR1=1
+BAR1LegacyIO=false
+BAR1Size=4
+BAR2=1
+BAR2LegacyIO=false
+BAR2Size=8
+BAR3=1
+BAR3LegacyIO=false
+BAR3Size=4
+BAR4=1
+BAR4LegacyIO=false
+BAR4Size=16
+BAR5=1
+BAR5LegacyIO=false
+BAR5Size=0
+BIST=0
+CacheLineSize=0
+CapabilityPtr=0
+CardbusCIS=0
+ClassCode=1
+Command=0
+DeviceID=28945
+ExpansionROM=0
+HeaderType=0
+InterruptLine=2
+InterruptPin=2
+LatencyTimer=0
+LegacyIOBase=0
+MSICAPBaseOffset=0
+MSICAPCapId=0
+MSICAPMaskBits=0
+MSICAPMsgAddr=0
+MSICAPMsgCtrl=0
+MSICAPMsgData=0
+MSICAPMsgUpperAddr=0
+MSICAPNextCapability=0
+MSICAPPendingBits=0
+MSIXCAPBaseOffset=0
+MSIXCAPCapId=0
+MSIXCAPNextCapability=0
+MSIXMsgCtrl=0
+MSIXPbaOffset=0
+MSIXTableOffset=0
+MaximumLatency=0
+MinimumGrant=0
+PMCAPBaseOffset=0
+PMCAPCapId=0
+PMCAPCapabilities=0
+PMCAPCtrlStatus=0
+PMCAPNextCapability=0
+PXCAPBaseOffset=0
+PXCAPCapId=0
+PXCAPCapabilities=0
+PXCAPDevCap2=0
+PXCAPDevCapabilities=0
+PXCAPDevCtrl=0
+PXCAPDevCtrl2=0
+PXCAPDevStatus=0
+PXCAPLinkCap=0
+PXCAPLinkCtrl=0
+PXCAPLinkStatus=0
+PXCAPNextCapability=0
+ProgIF=133
+Revision=0
+Status=640
+SubClassCode=1
+SubsystemID=0
+SubsystemVendorID=0
+VendorID=32902
+clk_domain=system.clk_domain
+config_latency=20000
+ctrl_offset=0
+default_p_state=UNDEFINED
+disks=system.cf0
+eventq_index=0
+host=system.realview.pci_host
+io_shift=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pci_bus=0
+pci_dev=1
+pci_func=0
+pio_latency=30000
+power_model=Null
system=system
-pio=system.iobus.port[21]
+dma=system.iobus.slave[3]
+pio=system.iobus.master[23]
[system.realview.kmi0]
type=Pl050
amba_id=1314896
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
gic=system.realview.gic
int_delay=1000000
-int_num=52
+int_num=44
is_mouse=false
-pio_addr=268460032
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470155264
+pio_latency=100000
+power_model=Null
system=system
vnc=system.vncserver
-pio=system.iobus.port[7]
+pio=system.iobus.master[7]
[system.realview.kmi1]
type=Pl050
amba_id=1314896
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
gic=system.realview.gic
int_delay=1000000
-int_num=53
+int_num=45
is_mouse=true
-pio_addr=268464128
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470220800
+pio_latency=100000
+power_model=Null
system=system
vnc=system.vncserver
-pio=system.iobus.port[8]
+pio=system.iobus.master[8]
[system.realview.l2x0_fake]
type=IsaFake
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
fake_mem=false
-pio_addr=520101888
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=739246080
+pio_latency=100000
pio_size=4095
+power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
system=system
update_data=false
warn_access=
-pio=system.membus.port[4]
+pio=system.iobus.master[12]
+
+[system.realview.lan_fake]
+type=IsaFake
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=436207616
+pio_latency=100000
+pio_size=65535
+power_model=Null
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=system
+update_data=false
+warn_access=
+pio=system.iobus.master[19]
[system.realview.local_cpu_timer]
type=CpuLocalTimer
-clock=1000
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
gic=system.realview.gic
int_num_timer=29
int_num_watchdog=30
-pio_addr=520095232
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=738721792
+pio_latency=100000
+power_model=Null
+system=system
+pio=system.membus.master[4]
+
+[system.realview.mcc]
+type=SubSystem
+children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl
+eventq_index=0
+thermal_domain=Null
+
+[system.realview.mcc.osc_clcd]
+type=RealViewOsc
+dcc=0
+device=1
+eventq_index=0
+freq=42105
+parent=system.realview.realview_io
+position=0
+site=0
+voltage_domain=system.voltage_domain
+
+[system.realview.mcc.osc_mcc]
+type=RealViewOsc
+dcc=0
+device=0
+eventq_index=0
+freq=20000
+parent=system.realview.realview_io
+position=0
+site=0
+voltage_domain=system.voltage_domain
+
+[system.realview.mcc.osc_peripheral]
+type=RealViewOsc
+dcc=0
+device=2
+eventq_index=0
+freq=41667
+parent=system.realview.realview_io
+position=0
+site=0
+voltage_domain=system.voltage_domain
+
+[system.realview.mcc.osc_system_bus]
+type=RealViewOsc
+dcc=0
+device=4
+eventq_index=0
+freq=41667
+parent=system.realview.realview_io
+position=0
+site=0
+voltage_domain=system.voltage_domain
+
+[system.realview.mcc.temp_crtl]
+type=RealViewTemperatureSensor
+dcc=0
+device=0
+eventq_index=0
+parent=system.realview.realview_io
+position=0
+site=0
system=system
-pio=system.membus.port[6]
[system.realview.mmc_fake]
type=AmbaFake
amba_id=0
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
ignore_access=false
-pio_addr=268455936
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470089728
+pio_latency=100000
+power_model=Null
+system=system
+pio=system.iobus.master[21]
+
+[system.realview.nvmem]
+type=SimpleMemory
+bandwidth=73.000000
+clk_domain=system.clk_domain
+conf_table_reported=false
+default_p_state=UNDEFINED
+eventq_index=0
+in_addr_map=true
+kvm_map=true
+latency=30000
+latency_var=0
+null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+range=0:67108863:0:0:0:0
+port=system.membus.master[1]
+
+[system.realview.pci_host]
+type=GenericPciHost
+clk_domain=system.clk_domain
+conf_base=805306368
+conf_device_bits=16
+conf_size=268435456
+default_p_state=UNDEFINED
+eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pci_dma_base=0
+pci_mem_base=0
+pci_pio_base=0
+platform=system.realview
+power_model=Null
system=system
-pio=system.iobus.port[25]
+pio=system.iobus.master[2]
[system.realview.realview_io]
type=RealViewCtrl
-idreg=0
-pio_addr=268435456
-pio_latency=1000
-proc_id0=201326592
-proc_id1=201327138
-system=system
-pio=system.iobus.port[2]
-
-[system.realview.rtc_fake]
-type=AmbaFake
-amba_id=266289
-ignore_access=false
-pio_addr=268529664
-pio_latency=1000
-system=system
-pio=system.iobus.port[26]
-
-[system.realview.sci_fake]
-type=AmbaFake
-amba_id=0
-ignore_access=false
-pio_addr=268492800
-pio_latency=1000
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+idreg=35979264
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=469827584
+pio_latency=100000
+power_model=Null
+proc_id0=335544320
+proc_id1=335544320
system=system
-pio=system.iobus.port[23]
-
-[system.realview.smc_fake]
-type=AmbaFake
-amba_id=0
-ignore_access=false
-pio_addr=269357056
-pio_latency=1000
+pio=system.iobus.master[1]
+
+[system.realview.rtc]
+type=PL031
+amba_id=3412017
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+gic=system.realview.gic
+int_delay=100000
+int_num=36
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=471269376
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[16]
+time=Thu Jan 1 00:00:00 2009
+pio=system.iobus.master[10]
[system.realview.sp810_fake]
type=AmbaFake
amba_id=0
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
ignore_access=true
-pio_addr=268439552
-pio_latency=1000
-system=system
-pio=system.iobus.port[17]
-
-[system.realview.ssp_fake]
-type=AmbaFake
-amba_id=0
-ignore_access=false
-pio_addr=268488704
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=469893120
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[22]
+pio=system.iobus.master[16]
[system.realview.timer0]
type=Sp804
amba_id=1316868
+clk_domain=system.clk_domain
clock0=1000000
clock1=1000000
+default_p_state=UNDEFINED
+eventq_index=0
gic=system.realview.gic
-int_num0=36
-int_num1=36
-pio_addr=268505088
-pio_latency=1000
+int_num0=34
+int_num1=34
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470876160
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[3]
+pio=system.iobus.master[3]
[system.realview.timer1]
type=Sp804
amba_id=1316868
+clk_domain=system.clk_domain
clock0=1000000
clock1=1000000
+default_p_state=UNDEFINED
+eventq_index=0
gic=system.realview.gic
-int_num0=37
-int_num1=37
-pio_addr=268509184
-pio_latency=1000
+int_num0=35
+int_num1=35
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470941696
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[4]
+pio=system.iobus.master[4]
[system.realview.uart]
type=Pl011
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
end_on_eot=false
+eventq_index=0
gic=system.realview.gic
int_delay=100000
-int_num=44
-pio_addr=268472320
-pio_latency=1000
+int_num=37
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470351872
+pio_latency=100000
platform=system.realview
+power_model=Null
system=system
terminal=system.terminal
-pio=system.iobus.port[1]
+pio=system.iobus.master[0]
[system.realview.uart1_fake]
type=AmbaFake
amba_id=0
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
ignore_access=false
-pio_addr=268476416
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470417408
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[13]
+pio=system.iobus.master[13]
[system.realview.uart2_fake]
type=AmbaFake
amba_id=0
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
ignore_access=false
-pio_addr=268480512
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470482944
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[14]
+pio=system.iobus.master[14]
[system.realview.uart3_fake]
type=AmbaFake
amba_id=0
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
ignore_access=false
-pio_addr=268484608
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470548480
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[15]
+pio=system.iobus.master[15]
+
+[system.realview.usb_fake]
+type=IsaFake
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=452984832
+pio_latency=100000
+pio_size=131071
+power_model=Null
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=system
+update_data=false
+warn_access=
+pio=system.iobus.master[20]
+
+[system.realview.vgic]
+type=VGic
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
+gic=system.realview.gic
+hv_addr=738213888
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_delay=10000
+platform=system.realview
+power_model=Null
+ppint=25
+system=system
+vcpu_addr=738222080
+pio=system.membus.master[3]
+
+[system.realview.vram]
+type=SimpleMemory
+bandwidth=73.000000
+clk_domain=system.clk_domain
+conf_table_reported=false
+default_p_state=UNDEFINED
+eventq_index=0
+in_addr_map=true
+kvm_map=true
+latency=30000
+latency_var=0
+null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
+range=402653184:436207615:0:0:0:0
+port=system.iobus.master[11]
[system.realview.watchdog_fake]
type=AmbaFake
amba_id=0
+clk_domain=system.clk_domain
+default_p_state=UNDEFINED
+eventq_index=0
ignore_access=false
-pio_addr=268500992
-pio_latency=1000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+pio_addr=470745088
+pio_latency=100000
+power_model=Null
system=system
-pio=system.iobus.port[18]
+pio=system.iobus.master[17]
[system.terminal]
type=Terminal
+eventq_index=0
intr_control=system.intrctrl
number=0
output=true
port=3456
-[system.toL2Bus]
-type=Bus
-block_size=64
-bus_id=0
-clock=1000
-header_cycles=1
-use_default_range=false
-width=64
-port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
[system.vncserver]
type=VncServer
+eventq_index=0
frame_capture=false
number=0
port=5900
+[system.voltage_domain]
+type=VoltageDomain
+eventq_index=0
+voltage=1.000000
+
projects / gem5.git / blobdiff