arch: Fix VecReg container alignement to 128bits view

[gem5.git] / tests / long / fs / 10.linux-boot / ref / arm / linux / realview64-simple-atomic-dual / config.ini

diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini
index 7268469a8bc14ccc21c5953c4d2cc5431b649e51..4ef1d1b229ef421444b2f48bd64a5a326ab3b260 100644 (file)
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini
@@ -12,23 +12,25 @@ time_sync_spin_threshold=100000000
 type=LinuxArmSystem
 children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
 atags_addr=134217728
-boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
+boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm64
 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
 cache_line_size=64
 clk_domain=system.clk_domain
-dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
+default_p_state=UNDEFINED
+dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch64.20140821.dtb
 early_kernel_symbols=false
 enable_context_switch_stats_dump=false
 eventq_index=0
+exit_on_work_items=false
 flags_addr=469827632
 gic_cpu_addr=738205696
 have_large_asid_64=false
-have_lpae=false
+have_lpae=true
 have_security=false
 have_virtualization=false
 highest_el_is_64=false
 init_param=0
-kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
+kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch64.20140821
 kernel_addr_check=true
 load_addr_mask=268435455
 load_offset=2147483648
@@ -40,12 +42,18 @@ mmap_using_noreserve=false
 multi_proc=true
 multi_thread=false
 num_work_ids=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 panic_on_oops=true
 panic_on_panic=true
 phys_addr_range_64=40
-readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh
+power_model=Null
+readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
 reset_addr_64=0
 symbolfile=
+thermal_components=
+thermal_model=Null
 work_begin_ckpt_count=0
 work_begin_cpu_id_exit=-1
 work_begin_exit_count=0
@@ -58,8 +66,13 @@ system_port=system.membus.slave[1]
 [system.bridge]
 type=Bridge
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 delay=50000
 eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
 req_size=16
 resp_size=16
@@ -86,7 +99,7 @@ table_size=65536
 [system.cf0.image.child]
 type=RawDiskImage
 eventq_index=0
-image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
+image_file=/arm/projectscratch/randd/systems/dist/disks/linaro-minimal-aarch64.img
 read_only=true
 
 [system.clk_domain]
@@ -104,6 +117,7 @@ branchPred=Null
 checker=Null
 clk_domain=system.cpu_clk_domain
 cpu_id=0
+default_p_state=UNDEFINED
 do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
@@ -122,6 +136,10 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 profile=0
 progress_interval=0
 simpoint_start_insts=
@@ -143,13 +161,17 @@ addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
 hit_latency=2
 is_read_only=false
 max_miss_count=0
 mshrs=6
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
@@ -168,8 +190,13 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=32768
 
@@ -192,9 +219,14 @@ walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
 [system.cpu0.dstage2_mmu.stage2_tlb.walker]
 type=ArmTableWalker
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sys=system
 
 [system.cpu0.dtb]
@@ -208,9 +240,14 @@ walker=system.cpu0.dtb.walker
 [system.cpu0.dtb.walker]
 type=ArmTableWalker
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 is_stage2=false
 num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sys=system
 port=system.cpu0.toL2Bus.slave[3]
 
@@ -221,13 +258,17 @@ addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=false
 hit_latency=1
 is_read_only=true
 max_miss_count=0
 mshrs=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=1
@@ -246,8 +287,13 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=32768
 
@@ -305,9 +351,14 @@ walker=system.cpu0.istage2_mmu.stage2_tlb.walker
 [system.cpu0.istage2_mmu.stage2_tlb.walker]
 type=ArmTableWalker
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sys=system
 
 [system.cpu0.itb]
@@ -321,9 +372,14 @@ walker=system.cpu0.itb.walker
 [system.cpu0.itb.walker]
 type=ArmTableWalker
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 is_stage2=false
 num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sys=system
 port=system.cpu0.toL2Bus.slave[2]
 
@@ -334,13 +390,17 @@ addr_ranges=0:18446744073709551615
 assoc=16
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_excl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
 hit_latency=12
 is_read_only=false
 max_miss_count=0
 mshrs=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=true
 prefetcher=system.cpu0.l2cache.prefetcher
 response_latency=12
@@ -358,6 +418,7 @@ mem_side=system.toL2Bus.slave[0]
 type=StridePrefetcher
 cache_snoop=false
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 degree=8
 eventq_index=0
 latency=1
@@ -368,6 +429,10 @@ on_inst=true
 on_miss=false
 on_read=true
 on_write=true
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 queue_filter=true
 queue_size=32
 queue_squash=true
@@ -384,8 +449,13 @@ type=RandomRepl
 assoc=16
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=12
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=1048576
 
@@ -393,9 +463,15 @@ size=1048576
 type=CoherentXBar
 children=snoop_filter
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=0
 frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=false
+power_model=Null
 response_latency=1
 snoop_filter=system.cpu0.toL2Bus.snoop_filter
 snoop_response_latency=1
@@ -423,6 +499,7 @@ branchPred=Null
 checker=Null
 clk_domain=system.cpu_clk_domain
 cpu_id=1
+default_p_state=UNDEFINED
 do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
@@ -441,6 +518,10 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 profile=0
 progress_interval=0
 simpoint_start_insts=
@@ -462,13 +543,17 @@ addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
 hit_latency=2
 is_read_only=false
 max_miss_count=0
 mshrs=6
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
@@ -487,8 +572,13 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=32768
 
@@ -511,9 +601,14 @@ walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
 [system.cpu1.dstage2_mmu.stage2_tlb.walker]
 type=ArmTableWalker
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sys=system
 
 [system.cpu1.dtb]
@@ -527,9 +622,14 @@ walker=system.cpu1.dtb.walker
 [system.cpu1.dtb.walker]
 type=ArmTableWalker
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 is_stage2=false
 num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sys=system
 port=system.cpu1.toL2Bus.slave[3]
 
@@ -540,13 +640,17 @@ addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=false
 hit_latency=1
 is_read_only=true
 max_miss_count=0
 mshrs=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=1
@@ -565,8 +669,13 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=32768
 
@@ -624,9 +733,14 @@ walker=system.cpu1.istage2_mmu.stage2_tlb.walker
 [system.cpu1.istage2_mmu.stage2_tlb.walker]
 type=ArmTableWalker
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sys=system
 
 [system.cpu1.itb]
@@ -640,9 +754,14 @@ walker=system.cpu1.itb.walker
 [system.cpu1.itb.walker]
 type=ArmTableWalker
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 is_stage2=false
 num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sys=system
 port=system.cpu1.toL2Bus.slave[2]
 
@@ -653,13 +772,17 @@ addr_ranges=0:18446744073709551615
 assoc=16
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_excl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
 hit_latency=12
 is_read_only=false
 max_miss_count=0
 mshrs=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=true
 prefetcher=system.cpu1.l2cache.prefetcher
 response_latency=12
@@ -677,6 +800,7 @@ mem_side=system.toL2Bus.slave[1]
 type=StridePrefetcher
 cache_snoop=false
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 degree=8
 eventq_index=0
 latency=1
@@ -687,6 +811,10 @@ on_inst=true
 on_miss=false
 on_read=true
 on_write=true
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 queue_filter=true
 queue_size=32
 queue_squash=true
@@ -703,8 +831,13 @@ type=RandomRepl
 assoc=16
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=12
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=1048576
 
@@ -712,9 +845,15 @@ size=1048576
 type=CoherentXBar
 children=snoop_filter
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=0
 frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=false
+power_model=Null
 response_latency=1
 snoop_filter=system.cpu1.toL2Bus.snoop_filter
 snoop_response_latency=1
@@ -759,9 +898,14 @@ sys=system
 [system.iobus]
 type=NoncoherentXBar
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=1
 frontend_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 response_latency=2
 use_default_range=false
 width=16
@@ -775,13 +919,17 @@ addr_ranges=2147483648:2415919103
 assoc=8
 clk_domain=system.clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=false
 hit_latency=50
 is_read_only=false
 max_miss_count=0
 mshrs=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=50
@@ -800,8 +948,13 @@ type=LRU
 assoc=8
 block_size=64
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=50
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=1024
 
@@ -812,13 +965,17 @@ addr_ranges=0:18446744073709551615
 assoc=8
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
 hit_latency=20
 is_read_only=false
 max_miss_count=0
 mshrs=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
@@ -837,20 +994,31 @@ type=LRU
 assoc=8
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=4194304
 
 [system.membus]
 type=CoherentXBar
-children=badaddr_responder
+children=badaddr_responder snoop_filter
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=4
 frontend_latency=3
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=true
+power_model=Null
 response_latency=2
-snoop_filter=Null
+snoop_filter=system.membus.snoop_filter
 snoop_response_latency=4
 system=system
 use_default_range=false
@@ -862,11 +1030,16 @@ slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.io
 [system.membus.badaddr_responder]
 type=IsaFake
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=0
 pio_latency=100000
 pio_size=8
+power_model=Null
 ret_bad_addr=true
 ret_data16=65535
 ret_data32=4294967295
@@ -877,16 +1050,28 @@ update_data=false
 warn_access=warn
 pio=system.membus.default
 
+[system.membus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=1
+max_capacity=8388608
+system=system
+
 [system.physmem]
 type=SimpleMemory
 bandwidth=73.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+default_p_state=UNDEFINED
 eventq_index=0
 in_addr_map=true
 latency=30000
 latency_var=0
 null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 range=2147483648:2415919103
 port=system.membus.master[5]
 
@@ -901,10 +1086,15 @@ system=system
 type=AmbaFake
 amba_id=0
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470024192
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[18]
 
@@ -985,14 +1175,19 @@ VendorID=32902
 clk_domain=system.clk_domain
 config_latency=20000
 ctrl_offset=2
+default_p_state=UNDEFINED
 disks=
 eventq_index=0
 host=system.realview.pci_host
 io_shift=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pci_bus=2
 pci_dev=0
 pci_func=0
 pio_latency=30000
+power_model=Null
 system=system
 dma=system.iobus.slave[2]
 pio=system.iobus.master[9]
@@ -1001,13 +1196,18 @@ pio=system.iobus.master[9]
 type=Pl111
 amba_id=1315089
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 enable_capture=true
 eventq_index=0
 gic=system.realview.gic
 int_num=46
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=471793664
 pio_latency=10000
 pixel_clock=41667
+power_model=Null
 system=system
 vnc=system.vncserver
 dma=system.iobus.slave[1]
@@ -1017,6 +1217,7 @@ pio=system.iobus.master[5]
 type=SubSystem
 children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
 eventq_index=0
+thermal_domain=Null
 
 [system.realview.dcc.osc_cpu]
 type=RealViewOsc
@@ -1087,10 +1288,15 @@ voltage_domain=system.voltage_domain
 [system.realview.energy_ctrl]
 type=EnergyCtrl
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 dvfs_handler=system.dvfs_handler
 eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470286336
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[22]
 
@@ -1170,17 +1376,22 @@ SubsystemVendorID=32902
 VendorID=32902
 clk_domain=system.clk_domain
 config_latency=20000
+default_p_state=UNDEFINED
 eventq_index=0
 fetch_comp_delay=10000
 fetch_delay=10000
 hardware_address=00:90:00:00:00:01
 host=system.realview.pci_host
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pci_bus=0
 pci_dev=0
 pci_func=0
 phy_epid=896
 phy_pid=680
 pio_latency=30000
+power_model=Null
 rx_desc_cache_size=64
 rx_fifo_size=393216
 rx_write_delay=0
@@ -1206,12 +1417,18 @@ type=Pl390
 clk_domain=system.clk_domain
 cpu_addr=738205696
 cpu_pio_delay=10000
+default_p_state=UNDEFINED
 dist_addr=738201600
 dist_pio_delay=10000
 eventq_index=0
+gem5_extensions=true
 int_latency=10000
 it_lines=128
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 platform=system.realview
+power_model=Null
 system=system
 pio=system.membus.master[2]
 
@@ -1219,14 +1436,19 @@ pio=system.membus.master[2]
 type=HDLcd
 amba_id=1314816
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 enable_capture=true
 eventq_index=0
 gic=system.realview.gic
 int_num=117
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=721420288
 pio_latency=10000
 pixel_buffer_size=2048
 pixel_chunk=32
+power_model=Null
 pxl_clk=system.realview.dcc.osc_pxl
 system=system
 vnc=system.vncserver
@@ -1312,14 +1534,19 @@ VendorID=32902
 clk_domain=system.clk_domain
 config_latency=20000
 ctrl_offset=0
+default_p_state=UNDEFINED
 disks=system.cf0
 eventq_index=0
 host=system.realview.pci_host
 io_shift=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pci_bus=0
 pci_dev=1
 pci_func=0
 pio_latency=30000
+power_model=Null
 system=system
 dma=system.iobus.slave[3]
 pio=system.iobus.master[23]
@@ -1328,13 +1555,18 @@ pio=system.iobus.master[23]
 type=Pl050
 amba_id=1314896
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 gic=system.realview.gic
 int_delay=1000000
 int_num=44
 is_mouse=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470155264
 pio_latency=100000
+power_model=Null
 system=system
 vnc=system.vncserver
 pio=system.iobus.master[7]
@@ -1343,13 +1575,18 @@ pio=system.iobus.master[7]
 type=Pl050
 amba_id=1314896
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 gic=system.realview.gic
 int_delay=1000000
 int_num=45
 is_mouse=true
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470220800
 pio_latency=100000
+power_model=Null
 system=system
 vnc=system.vncserver
 pio=system.iobus.master[8]
@@ -1357,11 +1594,16 @@ pio=system.iobus.master[8]
 [system.realview.l2x0_fake]
 type=IsaFake
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=739246080
 pio_latency=100000
 pio_size=4095
+power_model=Null
 ret_bad_addr=false
 ret_data16=65535
 ret_data32=4294967295
@@ -1375,11 +1617,16 @@ pio=system.iobus.master[12]
 [system.realview.lan_fake]
 type=IsaFake
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=436207616
 pio_latency=100000
 pio_size=65535
+power_model=Null
 ret_bad_addr=false
 ret_data16=65535
 ret_data32=4294967295
@@ -1393,19 +1640,25 @@ pio=system.iobus.master[19]
 [system.realview.local_cpu_timer]
 type=CpuLocalTimer
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 gic=system.realview.gic
 int_num_timer=29
 int_num_watchdog=30
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=738721792
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.membus.master[4]
 
 [system.realview.mcc]
 type=SubSystem
-children=osc_clcd osc_mcc osc_peripheral osc_system_bus
+children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl
 eventq_index=0
+thermal_domain=Null
 
 [system.realview.mcc.osc_clcd]
 type=RealViewOsc
@@ -1451,14 +1704,29 @@ position=0
 site=0
 voltage_domain=system.voltage_domain
 
+[system.realview.mcc.temp_crtl]
+type=RealViewTemperatureSensor
+dcc=0
+device=0
+eventq_index=0
+parent=system.realview.realview_io
+position=0
+site=0
+system=system
+
 [system.realview.mmc_fake]
 type=AmbaFake
 amba_id=0
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470089728
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[21]
 
@@ -1467,11 +1735,16 @@ type=SimpleMemory
 bandwidth=73.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+default_p_state=UNDEFINED
 eventq_index=0
 in_addr_map=true
 latency=30000
 latency_var=0
 null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 range=0:67108863
 port=system.membus.master[1]
 
@@ -1481,21 +1754,31 @@ clk_domain=system.clk_domain
 conf_base=805306368
 conf_device_bits=12
 conf_size=268435456
+default_p_state=UNDEFINED
 eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pci_dma_base=0
 pci_mem_base=0
 pci_pio_base=788529152
 platform=system.realview
+power_model=Null
 system=system
 pio=system.iobus.master[2]
 
 [system.realview.realview_io]
 type=RealViewCtrl
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 idreg=35979264
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=469827584
 pio_latency=100000
+power_model=Null
 proc_id0=335544320
 proc_id1=335544320
 system=system
@@ -1505,12 +1788,17 @@ pio=system.iobus.master[1]
 type=PL031
 amba_id=3412017
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 gic=system.realview.gic
 int_delay=100000
 int_num=36
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=471269376
 pio_latency=100000
+power_model=Null
 system=system
 time=Thu Jan  1 00:00:00 2009
 pio=system.iobus.master[10]
@@ -1519,10 +1807,15 @@ pio=system.iobus.master[10]
 type=AmbaFake
 amba_id=0
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 ignore_access=true
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=469893120
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[16]
 
@@ -1532,12 +1825,17 @@ amba_id=1316868
 clk_domain=system.clk_domain
 clock0=1000000
 clock1=1000000
+default_p_state=UNDEFINED
 eventq_index=0
 gic=system.realview.gic
 int_num0=34
 int_num1=34
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470876160
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[3]
 
@@ -1547,26 +1845,36 @@ amba_id=1316868
 clk_domain=system.clk_domain
 clock0=1000000
 clock1=1000000
+default_p_state=UNDEFINED
 eventq_index=0
 gic=system.realview.gic
 int_num0=35
 int_num1=35
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470941696
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[4]
 
 [system.realview.uart]
 type=Pl011
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 end_on_eot=false
 eventq_index=0
 gic=system.realview.gic
 int_delay=100000
 int_num=37
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470351872
 pio_latency=100000
 platform=system.realview
+power_model=Null
 system=system
 terminal=system.terminal
 pio=system.iobus.master[0]
@@ -1575,10 +1883,15 @@ pio=system.iobus.master[0]
 type=AmbaFake
 amba_id=0
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470417408
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[13]
 
@@ -1586,10 +1899,15 @@ pio=system.iobus.master[13]
 type=AmbaFake
 amba_id=0
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470482944
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[14]
 
@@ -1597,21 +1915,31 @@ pio=system.iobus.master[14]
 type=AmbaFake
 amba_id=0
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470548480
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[15]
 
 [system.realview.usb_fake]
 type=IsaFake
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=452984832
 pio_latency=100000
 pio_size=131071
+power_model=Null
 ret_bad_addr=false
 ret_data16=65535
 ret_data32=4294967295
@@ -1625,11 +1953,16 @@ pio=system.iobus.master[20]
 [system.realview.vgic]
 type=VGic
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 gic=system.realview.gic
 hv_addr=738213888
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_delay=10000
 platform=system.realview
+power_model=Null
 ppint=25
 system=system
 vcpu_addr=738222080
@@ -1640,11 +1973,16 @@ type=SimpleMemory
 bandwidth=73.000000
 clk_domain=system.clk_domain
 conf_table_reported=false
+default_p_state=UNDEFINED
 eventq_index=0
 in_addr_map=true
 latency=30000
 latency_var=0
 null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 range=402653184:436207615
 port=system.iobus.master[11]
 
@@ -1652,10 +1990,15 @@ port=system.iobus.master[11]
 type=AmbaFake
 amba_id=0
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 pio_addr=470745088
 pio_latency=100000
+power_model=Null
 system=system
 pio=system.iobus.master[17]
 
@@ -1671,9 +2014,15 @@ port=3456
 type=CoherentXBar
 children=snoop_filter
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=0
 frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=false
+power_model=Null
 response_latency=1
 snoop_filter=system.toL2Bus.snoop_filter
 snoop_response_latency=1