arch: Fix VecReg container alignement to 128bits view

[gem5.git] / tests / long / fs / 10.linux-boot / ref / arm / linux / realview64-simple-timing-dual / simout

diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout
index c648cad5f277b82252e41b9a0d74e95d443bd986..7bd8ed2ad442750bf369d27b3f86b1ca550afda1 100755 (executable)
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout
@@ -3,9 +3,9 @@ Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realvi
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 21 2016 14:37:41
-gem5 started Jul 21 2016 14:41:50
-gem5 executing on e108600-lin, pid 23131
+gem5 compiled Oct 11 2016 00:00:58
+gem5 started Oct 13 2016 20:42:59
+gem5 executing on e108600-lin, pid 17314
 command line: /work/curdun01/gem5-external.hg/build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing-dual -re /work/curdun01/gem5-external.hg/tests/testing/../run.py long/fs/10.linux-boot/arm/linux/realview64-simple-timing-dual
 
 Selected 64-bit ARM architecture, updating default disk image...
@@ -15,4 +15,4 @@ info: Using bootloader at address 0x10
 info: Using kernel entry physical address at 0x80080000
 info: Loading DTB file: /arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 47403574916500 because m5_exit instruction encountered
+Exiting @ tick 47405012960500 because m5_exit instruction encountered