arch: Fix VecReg container alignement to 128bits view

[gem5.git] / tests / long / fs / 10.linux-boot / ref / x86 / linux / pc-o3-timing / stats.txt

diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt
index 63eb8fdf24f4bd85a653ea81f13a997da7eb9f93..30d85e2f4857ee540d2ea113a8d0cf1175d4bb78 100644 (file)
--- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt
+++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  5.230834                       # Nu
 sim_ticks                                5230834315000                       # Number of ticks simulated
 final_tick                               5230834315000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 185450                       # Simulator instruction rate (inst/s)
-host_op_rate                                   366593                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             2377836678                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 757080                       # Number of bytes of host memory used
-host_seconds                                  2199.83                       # Real time elapsed on the host
+host_inst_rate                                 207627                       # Simulator instruction rate (inst/s)
+host_op_rate                                   410431                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             2662189440                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 751184                       # Number of bytes of host memory used
+host_seconds                                  1964.86                       # Real time elapsed on the host
 sim_insts                                   407959263                       # Number of instructions simulated
 sim_ops                                     806441023                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts